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    Method and circuit to perform a trimming phase on electronic circuits
    2.
    发明公开
    Method and circuit to perform a trimming phase on electronic circuits 有权
    Verfahren und Vorrichtung zur Trimmung von elektronischen Schaltungen

    公开(公告)号：EP1120828A1

    公开(公告)日：2001-08-01

    申请号：EP00830059.2

    申请日：2000-01-28

    Applicant: STMicroelectronics S.r.l.

    Inventor： Pulvirenti, Francesco

    IPC: H01L21/66 ,  H03K17/693

    CPC classification number: G11C17/18 ,  G01R31/31701

    Abstract: The invention relates to a method and a circuit for carrying out a trimming operation on integrated circuits (2) having a trimming circuit portion (1) which includes memory elements (10) and a means (8) of modifying the state of said memory elements (10), at least a first input or supply pin (IN), an output pin (OUT), and a second supply pin (GND). The method comprises the following steps:

    enabling a single pin (OUT) to receive trimming data by biasing the pin to outside its operating range;
    to acquire such data, obtaining a clock signal from a division of the bias potential of the trimming pin (OUT);
    obtaining the logic value of the trimming data from a different division of the bias potential of said pin (OUT);
    enabling serial acquisition of the data according to the clock signal; and
    transferring the data to the means (8) of modifying the state of the memory elements (10).

    Advantageously, the data are also transferred into a selection logic (11), by-passing the means (8) for modifying the state of the memory elements (10), on the occurrence of a simulated trimming operation.

    Abstract translation: 本发明涉及一种用于对具有修整电路部分（1）的集成电路（2）进行修整操作的方法和电路，该修整电路部分（1）包括存储元件（10）和修改所述存储元件的状态的装置（8） （10），至少第一输入或电源引脚（IN），输出引脚（OUT）和第二电源引脚（GND）。 该方法包括以下步骤：通过将引脚偏置在其工作范围之外，使单个引脚（OUT）能够接收修剪数据; 获取这样的数据，从修整引脚（OUT）的偏置电位的除法获得时钟信号; 从所述引脚（OUT）的偏置电位的不同分割获得修整数据的逻辑值; 使得能够根据时钟信号串行获取数据; 以及将数据传送到修改存储元件（10）的状态的装置（8）。 有利地，在模拟修整操作的发生时，数据也被转移到选择逻辑（11）中，绕过用于修改存储元件（10）的状态的装置（8）。

    DC-DC converter usable as a battery charger, and method for charging a battery
    3.
    发明公开
    DC-DC converter usable as a battery charger, and method for charging a battery 有权
    ALS BATTERIELADER BENUTZBARER GLEICHSTROMWANDLER，UND VERFAHREN ZUM AUFLADEN EINER BATTERIE

    公开(公告)号：EP1049230A1

    公开(公告)日：2000-11-02

    申请号：EP99830258.2

    申请日：1999-04-29

    Applicant: STMicroelectronics S.r.l.

    Inventor： Pappalardo, Salvatore ,  Pulvirenti, Francesco

    IPC: H02J7/00

    CPC classification number: H02J7/0052

    Abstract: The DC-DC converter (1') comprises a current error amplifier (34') and a voltage error amplifier (30) connected in parallel to control the charging phase of the battery (18), during which a charging current (IBAT) is supplied to the battery (18) to bring the voltage (VBAT) of the battery (18) gradually up to a full charge voltage (VFIN); a charging interruption stage (QA, QB, MS5) for interrupting the charging phase before the voltage (VBAT) of the battery has reached the full charge voltage (VFIN); and an activation stage (104, 106) for activating the charging interruption stage (QA, QB, MS5) when the full charge voltage (VFIN) is close to the supply potential (VCC) at which the supply line (6) of the current error amplifier (34') is set.

    Abstract translation: DC-DC转换器（1'）包括并联连接的电流误差放大器（34'）和电压误差放大器（30），以控制电池（18）的充电阶段，在此期间充电电流（IBAT）为 提供给电池（18）以使电池（18）的电压（VBAT）逐渐升至满充电电压（VFIN）; 用于在电池电压（VBAT）达到完全充电电压（VFIN）之前中断充电阶段的充电中断阶段（QA，QB，MS5）; 以及当所述满充电电压（VFIN）接近所述电源（6）的所述电源电位（VCC）时，用于激活所述充电中断级（QA，QB，MS5）的激活级（104,106） 设置误差放大器（34'）。

    Method and circuit to perform a trimming phase on electronic circuits
    6.
    发明授权
    Method and circuit to perform a trimming phase on electronic circuits 有权
    用于电子电路的修整的方法和设备

    公开(公告)号：EP1120828B1

    公开(公告)日：2005-04-06

    申请号：EP00830059.2

    申请日：2000-01-28

    Applicant: STMicroelectronics S.r.l.

    Inventor： Pulvirenti, Francesco

    IPC: H01L21/66 ,  H03K17/693

    CPC classification number: G11C17/18 ,  G01R31/31701

    Abstract: The invention relates to a method and a circuit for carrying out a trimming operation on integrated circuits (2) having a trimming circuit portion (1) which includes memory elements (10) and a means (8) of modifying the state of said memory elements (10), at least a first input or supply pin (IN), an output pin (OUT), and a second supply pin (GND). The method comprises the following steps: enabling a single pin (OUT) to receive trimming data by biasing the pin to outside its operating range; to acquire such data, obtaining a clock signal from a division of the bias potential of the trimming pin (OUT); obtaining the logic value of the trimming data from a different division of the bias potential of said pin (OUT); enabling serial acquisition of the data according to the clock signal; and transferring the data to the means (8) of modifying the state of the memory elements (10). Advantageously, the data are also transferred into a selection logic (11), by-passing the means (8) for modifying the state of the memory elements (10), on the occurrence of a simulated trimming operation.

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