公开(公告)号：EP4365944A1

公开(公告)日：2024-05-08

申请号：EP23207394.0

申请日：2023-11-02

Applicant: STMicroelectronics S.r.l.

Inventor： SANNA, Auroroa ,  SOMMA, Cristina ,  HALICKI, Damian

IPC: H01L23/498 ,  H01L23/50

CPC classification number: H01L23/50 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838

Abstract: A semiconductor device comprises a semiconductor die mounted at a die area (14) of a package (10) such as a BGA package with an array of electrically conductive balls (12) providing electrical contact for the semiconductor die. A power channel (16) is provided to convey power supply current towards the semiconductor die (14). The power channel (16) comprises a stack of electrically conductive planes (12A) between a current inflow plane (L8) opposite the die area (14) and a current outflow plane (L3) towards the die area (14). A distribution of electrically conductive balls (12) is coupled to the current inflow plane (L8) of the power channel (16) so that the power channel (16) provides current conduction paths towards the die area (14) for electrically conductive balls (12) in that distribution. Adjacent electrically conductive planes (12A) in the stack of the power channel (16) are electrically coupled with electrically conductive vias (120) extending therebetween. The electrically conductive planes (12A) are stacked in a stepped arrangement (Step1, Step2, Step3, Step4) wherein the number of stacked planes (12A) increases in steps in the direction from the distal end (PE) to the proximal end of the power channel (16). The current conduction paths towards the die area (14) thus have resistance values that decrease from the distal end (PE) to the proximal end of the power channel (16).
A uniform distribution of power supply current over the length of the power channel (16) is thus facilitated.