公开(公告)号：EP4365944A1

公开(公告)日：2024-05-08

申请号：EP23207394.0

申请日：2023-11-02

Applicant: STMicroelectronics S.r.l.

Inventor： SANNA, Auroroa ,  SOMMA, Cristina ,  HALICKI, Damian

IPC: H01L23/498 ,  H01L23/50

CPC classification number: H01L23/50 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838

Abstract: A semiconductor device comprises a semiconductor die mounted at a die area (14) of a package (10) such as a BGA package with an array of electrically conductive balls (12) providing electrical contact for the semiconductor die. A power channel (16) is provided to convey power supply current towards the semiconductor die (14). The power channel (16) comprises a stack of electrically conductive planes (12A) between a current inflow plane (L8) opposite the die area (14) and a current outflow plane (L3) towards the die area (14). A distribution of electrically conductive balls (12) is coupled to the current inflow plane (L8) of the power channel (16) so that the power channel (16) provides current conduction paths towards the die area (14) for electrically conductive balls (12) in that distribution. Adjacent electrically conductive planes (12A) in the stack of the power channel (16) are electrically coupled with electrically conductive vias (120) extending therebetween. The electrically conductive planes (12A) are stacked in a stepped arrangement (Step1, Step2, Step3, Step4) wherein the number of stacked planes (12A) increases in steps in the direction from the distal end (PE) to the proximal end of the power channel (16). The current conduction paths towards the die area (14) thus have resistance values that decrease from the distal end (PE) to the proximal end of the power channel (16).
A uniform distribution of power supply current over the length of the power channel (16) is thus facilitated.

公开(公告)号：EP3832716A1

公开(公告)日：2021-06-09

申请号：EP20210563.1

申请日：2020-11-30

Applicant: STMicroelectronics S.r.l.

Inventor： SOMMA, Cristina ,  GRAZIOSI, Giovanni

IPC: H01L23/498 ,  H01L23/50 ,  H01L23/538

Abstract: An assortment of semiconductor devices (10, 20) is designed by designing a first device (10), such as e.g. a mid/low-performance package, with a first rectangular substrate (11) having a first width (X) and a first length (Y) as well as a central semiconductor circuit mounting location (12) with electrically-conductive formations (a ball grid array or BGA, for instance) providing a first pattern of electrical interface nodes at first (10A), second (10B) and third (10C) sides of the rectangular shape as well as a first set (R1, R3) of electrical interface nodes at the fourth side (10D) of the rectangular shape. A second semiconductor device (20), such as a high-performance package, for instance, is designed with a second rectangular shape having a second width (X') equal to the first width (X), a second length (Y') and a median line (ML) extending in the direction of the second width (X') as well as a pair of semiconductor circuit mounting locations (221, 222) on opposite sides of the median line (ML). A second pattern of electrical interface nodes for the second device (20) is designed to comprise two unmorphed replicas of the first pattern arranged mutually rotated 180° on opposite sides of the median line (ML) as well as two second sets (R2, R4) of electrical interface nodes located between the pair of semiconductor circuit mounting locations (221, 222) and comprising two smaller morphed replicas (R2, R4) of the first set (R1, R3) of electrical interface nodes arranged mutually rotated 180° on opposite sides of said median line, wherein the length (Y') of the second device (20) is less than twice the length (Y) of the first device (10).

公开(公告)号：EP4009365A1

公开(公告)日：2022-06-08

申请号：EP21210940.9

申请日：2021-11-29

Applicant: STMicroelectronics S.r.l.

Inventor： SOMMA, Cristina ,  SANNA, Aurora ,  HALICKI, Damian

IPC: H01L23/528 ,  H01L23/522 ,  H01L23/498 ,  H01L23/50 ,  H01L23/00 ,  H05K1/02 ,  H05K7/14

Abstract: A semiconductor device comprises a semiconductor die mounted at a die area of a package (10) such as an BGA package with an array of electrically-conductive balls (12) providing electrical contact for the semiconductor die. A power channel (16) is provided to convey a power supply current (CF) to the semiconductor die (14).
The power channel (16) comprises one or more electrically-conductive planes (12A) extending in a longitudinal direction of the electrically-conductive plane (12A) between a distal end at the periphery of the package (10) and a proximal end at the die area (14) of the package (10) and a distribution of electrically-conductive balls (12) distributed along a longitudinal direction of the electrically conductive plane (12A).
The one or more electrically-conductive planes (12A) comprise subsequent portions in the longitudinal direction between adjacent electrically-conductive balls (12). These subsequent portions have respective electrical resistance values, which are monotonously decreasing (Rshape_8
A uniform distribution of power supply current (CF) over the length of the power channel is thus facilitated.