公开(公告)号：EP1318440A1

公开(公告)日：2003-06-11

申请号：EP01830744.7

申请日：2001-12-04

Applicant: STMicroelectronics S.r.l.

Inventor： Surico, Stefano

IPC: G05B19/045 ,  G11C16/06

CPC classification number: G05B19/045 ,  G05B2219/23245 ,  G05B2219/23289 ,  G11C16/06

Abstract: An interface comprising a finite states machine and logic circuits for adapting it to a given specification, for managing asynchronous and independent interactions between external circuits, by way of user commands, and a plurality of internal circuits each functioning with a clock generally different from the clock of other internal circuits, of an integrated digital system, is defined to work with a unique clock and unique reset and further comprises an arbitration structure of the input signal provided to the finite states machine, comprising a memory buffer in which any user command or any command or datum, generated by any one of said internal circuits issued during a phase in which said finite states machine is carrying out an evaluation is stored.
The interface is particularly suited to constitute a command interpreter of a FLASH-EEPROM device.

Abstract translation: 的接口，其包括有限状态机和逻辑电路，用于它适应一个给定的规范中，用于管理外部电路之间的异步和独立的相互作用，通过用户命令的方式，并且内部电路的多个与时钟基因反弹从时钟不同每个功能 其他的内部电路的，集成的数字系统的，被限定了一个独特的时钟和独特的复位，并提供给有限状态机的输入信号的仲裁结构还包括工作，其中包括：存储器缓冲器中的任何用户命令或任何 命令或日期，通过在其中将相位发出所述内部电路中的任何一个产生的所述有限状态机被进行评价被存储。 界面特别适合于构成闪速EEPROM装置的命令解释程序。

公开(公告)号：EP1308964B1

公开(公告)日：2007-10-03

申请号：EP01830671.2

申请日：2001-10-25

Applicant: STMicroelectronics S.r.l.

Inventor： Lomazzi, Guido ,  Mulatti, Jacopo ,  Surico, Stefano

IPC: G11C16/10

CPC classification number: G11C16/10 ,  G11C2216/14 ,  G11C2216/16

公开(公告)号：EP1318440B1

公开(公告)日：2005-08-17

申请号：EP01830744.7

申请日：2001-12-04

Applicant: STMicroelectronics S.r.l.

Inventor： Surico, Stefano

IPC: G05B19/045 ,  G11C16/06

CPC classification number: G05B19/045 ,  G05B2219/23245 ,  G05B2219/23289 ,  G11C16/06

公开(公告)号：EP1308964A1

公开(公告)日：2003-05-07

申请号：EP01830671.2

申请日：2001-10-25

Applicant: STMicroelectronics S.r.l.

Inventor： Lomazzi, Guido ,  Mulatti, Jacopo ,  Surico, Stefano

IPC: G11C16/10

CPC classification number: G11C16/10 ,  G11C2216/14 ,  G11C2216/16

Abstract: The programming method includes the following steps: sequentially receiving (23, 27) a plurality of data words; temporarily storing (24, 29) each data word after its reception; and simultaneously writing (31, 35) in parallel the plurality of stored data words in a memory array. After reception and temporary storage of each data word, the memory increments (25) an address counter and sends a "ready" signal (26). Upon reception of each new data word (27), the memory verifies whether the address associated thereto is in the same sector as the initial data word (28) and whether n data words have already been stored (30). If the sector is different, blind-programming step is terminated (35, 36) and the verifying is carried out (37); if the sector is the same but n data words have already been stored temporarily, the memory writes the temporarily stored words in the memory array (31), updates the address counter (25), and then sends the "ready" signal (26).

Abstract translation: 该编程方法包括以下步骤：顺序地接收（23，27）的数据字的多个; 暂时存储（24，29）其接收之后每个数据字; 同时，并与存储数据字的在存储器阵列中的多个书写（31，35）并联连接。 接收和每个数据字的临时存储之后，存储器增量（25），以解决计数器并发送一个“就绪”信号（26）。 在每个新的数据字（27）的接收，所述存储器确认是否在其上的地址相关联是在相同的扇区，不论数据字已经被存储的所述初始数据字（28）和n（30）。 如果该扇区是不同的，盲的编程步骤被终止（35，36）和所述验证被执行（37）; 如果该扇区是相同的，但n个数据字已经被暂时存储，存储器写入所述存储器阵列中的暂时存储字（31）更新地址计数器（25），然后发送“准备”信号（26） ，