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公开(公告)号:EP2506432A1
公开(公告)日:2012-10-03
申请号:EP12162761.6
申请日:2012-03-30
Applicant: STMicroelectronics S.r.l.
Inventor: Ucciadello, Carmelo , Conte, Antonino , Signorello, Alfredo
CPC classification number: H03K17/102 , H03K3/356113
Abstract: A level-shifter circuit (10) has: a pair of inputs which receive a first and a second low-voltage phase signal (FX, FN), having a first voltage dynamics with a first maximum value (Vdd); and a pair of outputs which supply a first high-voltage phase signal (FHX) and a second high-voltage phase signal (FHN), level-shifted with respect to the low-voltage signals and having a second voltage dynamics with a second maximum value (VddH), higher than the first maximum value (Vdd); the circuit is further provided with transfer transistors (M n1 , M n2 , M p1 , M p2 ) coupled between a first reference terminal or a second reference terminal, which are set at a first reference voltage (Gnd) or a second reference voltage (VddH), and the first output or second output; and protection elements (M nc1 , M nc2 , M pc1 , M pc2 ) coupled to a respective transfer transistor in such a way as to protect it from overvoltages between the corresponding conduction terminals and/or control terminals.
Abstract translation: 电平移位器电路(10)具有:一对输入,其接收具有第一最大值(Vdd)的第一电压动态特性的第一和第二低电压相位信号(FX,FN); 以及一对输出,其提供相对于所述低电压信号电平移位的第一高电压相位信号(FHX)和第二高电压相位信号(FHN),并且具有第二电压动态特性,具有第二最大值 值(VddH),高于第一最大值(Vdd); 电路还设置有耦合在第一参考端子或第二参考端子之间的转换晶体管(M n1,M n2,M p1,M p2),其被设置在第一参考电压(Gnd)或第二参考电压 VddH)和第一输出或第二输出; 以及耦合到各个传输晶体管的保护元件(M nc1,M nc2,M pc1,M pc2),以保护其免受相应的导通端子和/或控制端子之间的过电压。