MOS transistor having a trench-gate and method of manufacturing the same
    1.
    发明公开
    MOS transistor having a trench-gate and method of manufacturing the same 审中-公开
    MOSFET mit Graben-Gateelektrode und dessen Herstellungsverfahren

    公开(公告)号:EP1742270A1

    公开(公告)日:2007-01-10

    申请号:EP05106115.8

    申请日:2005-07-06

    Abstract: An insulated-gate transistor (100) includes a semiconductor layer (120) of a first conductivity type, an insulated gate comprising a trench gate (110) extending into the semiconductor layer, a source and a drain regions of a second conductivity type formed in the semiconductor layer at respective sides of the trench gate, wherein each one of the source and drain regions includes a first doped region (130,140), having a first dopant concentration, formed in the semiconductor layer adjacent to the trench gate, said first dopant concentration being such that a breakdown voltage of the junction formed by the first doped region and the semiconductor layer is higher than a predetermined breakdown voltage, and a second doped region (150,160), having a second dopant concentration higher than the first dopant concentration, said second doped region being formed in the first doped region and being spaced apart from the trench gate, the second dopant concentration being adapted to form a non-rectifying contact for electrically contacting the first doped region.

    Abstract translation: 绝缘栅晶体管(100)包括第一导电类型的半导体层(120),包括延伸到半导体层中的沟槽栅极(110)的绝缘栅极,形成在第二导电类型中的第二导电类型的源极区域和漏极区域 所述沟槽栅极的相应侧的所述半导体层,其中所述源极和漏极区域中的每一个包括形成在与所述沟槽栅极相邻的所述半导体层中的第一掺杂剂浓度的第一掺杂区域,所述第一掺杂浓度 使得由第一掺杂区域和半导体层形成的结的击穿电压高于预定的击穿电压;以及具有高于第一掺杂剂浓度的第二掺杂浓度的第二掺杂区域(150,160),所述第二掺杂区域 掺杂区域形成在第一掺杂区域中并且与沟槽栅极间隔开,第二掺杂剂浓度适于形成非直角 用于电接触第一掺杂区域。

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