Abstract:
A method for controlling an electric motor (3) by using the PWM technique; the control method includes the steps of: applying to the clamps (38) of the electric motor (3) an electric voltage (Vm(t)) varying in time, which displays a square waveform and consists of a sequence of pulses having a uniform wave period and a variable amplitude; adjusting the average value of the electric voltage (Vm(t)) applied to the clamps (38) of the electric motor (3) by varying the amplitude of the pulses of the electric voltage (Vm(t)); determining, in the case of a variation of the amplitude of the pulses, the overall required amplitude variation; subdividing the overall required amplitude variation in a determined number of partial variations, the overall sum of which is equivalent to the overall required amplitude variation; and gradually varying the amplitude of the pulses of the electric voltage (Vm(t)) by applying in a sequence a corresponding partial variation to each pulse, so that the difference between the amplitude of a pulse and the amplitude of a following pulse is equivalent to the corresponding partial variation.
Abstract:
A system is described for the diagnosis of a driver (D) of the type adapted to detect one or more circuit anomalies which can occur in the said driver, including:
voltage comparator circuits (10, 20) adapted to generate diagnostic logic signals (F 1 , F 2 , F 3 ) each indicative of the existence of a corresponding type of anomaly; and a coding circuit (M, SM) adapted to receive these diagnostic signals (F 1 , F 2 , F 3 ) and to output information relating to an overall operating state of the circuit. The coding circuit (M, SM) includes a first portion adapted to provide at its output first logic signals (SHB, SHG, OL) indicative of the last anomaly occurred since a system reset operation, and a second portion for coding such first logic signals (SHB, SHG, OL). The second portion includes a sequential logic network (SM) adapted to:
receive the first logic input signals (SHB, SHG, OL) and at least one second logic signal (IN) indicative of the current operating phase of the driver (D); and achieve, as a function of the said first and second logic signals (SHB, SHG, OL; IN) a stable internal state such as to determine at the output information in the form of an N bit coded word representative of an occurred anomaly, of a condition of absence of anomaly in the current operating phase, or of a condition of absence of anomaly in any operating phase.