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    A system for the complete diagnosis of a driver
    1.
    发明公开
    A system for the complete diagnosis of a driver 有权
    Einrichtung zurvollständigen诊断eine Treibers

    公开(公告)号：EP1052518A1

    公开(公告)日：2000-11-15

    申请号：EP99830294.7

    申请日：1999-05-13

    Applicant: STMicroelectronics S.r.l. ,  MAGNETI MARELLI S.p.A.

    Inventor： Milanesi, Andrea ,  Chicca, Stefania ,  Poletto, Vanni ,  Giorgetta, Valerio ,  Sgatti, Stefano ,  Vigna, Sergio

    IPC: G01R31/02

    CPC classification number: G01R31/024

    Abstract: A system is described for the diagnosis of a driver (D) of the type adapted to detect one or more circuit anomalies which can occur in the said driver, including:

    voltage comparator circuits (10, 20) adapted to generate diagnostic logic signals (F 1 , F 2 , F 3 ) each indicative of the existence of a corresponding type of anomaly; and
    a coding circuit (M, SM) adapted to receive these diagnostic signals (F 1 , F 2 , F 3 ) and to output information relating to an overall operating state of the circuit. The coding circuit (M, SM) includes a first portion adapted to provide at its output first logic signals (SHB, SHG, OL) indicative of the last anomaly occurred since a system reset operation, and a second portion for coding such first logic signals (SHB, SHG, OL). The second portion includes a sequential logic network (SM) adapted to:


    receive the first logic input signals (SHB, SHG, OL) and at least one second logic signal (IN) indicative of the current operating phase of the driver (D); and
    achieve, as a function of the said first and second logic signals (SHB, SHG, OL; IN) a stable internal state such as to determine at the output information in the form of an N bit coded word representative of an occurred anomaly, of a condition of absence of anomaly in the current operating phase, or of a condition of absence of anomaly in any operating phase.

    Abstract translation: 描述了用于诊断适于检测可能发生在所述驱动器中的一个或多个电路异常的类型的驱动器（D）的系统，包括：适于产生诊断逻辑信号的电压比较器电路（10,20）（F1 ，F2，F3），每个指示存在相应类型的异常; 以及适于接收这些诊断信号（F1，F2，F3）的编码电路（M，SM），并且输出与电路的总体工作状态有关的信息。 编码电路（M，SM）包括适于在其输出端提供指示自系统复位操作以来发生的最后异常的第一逻辑信号（SHB，SHG，OL）的第一部分和用于对这些第一逻辑信号进行编码的第二部分 （SHB，SHG，OL）。 第二部分包括适于：接收第一逻辑输入信号（SHB，SHG，OL）的顺序逻辑网络（SM）和指示驾驶员（D）的当前操作阶段的至少一个第二逻辑信号（IN）; 并且作为所述第一和第二逻辑信号（SHB，SHG，OL; IN）的函数实现稳定的内部状态，例如以表示发生的异常的N位编码字的形式在输出信息处确定， 在当前运行阶段没有异常的情况，或任何运行阶段没有异常的情况。

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