Abstract:
A method of processing digital images in devices for acquiring both individual images and image sequences, comprising the step of acquiring images in CFA (colour filter array) format and the step of reducing the resolution of the images acquired. In order to reduce computing time and energy consumption, the resolution-reduction step processes the images directly in CFA format.
Abstract:
A digital camera for capturing and processing images of different resolutions is described together with a method for down-scaling a digital image. The method comprises the steps of forming an image of a real scene on an image sensor (4) comprising a plurality of pixels arranged in a matrix, addressing and reading pixels in the matrix to obtain analogue quantities related with the pixels luminance values, converting (5) the analogue quantities from the pixels matrix into digital values and processing (6-13) the digital values to obtain a data file representing the image of the real scene. To reduce computation time and power consumption the step of addressing and reading pixels includes the steps of selecting a group of pixels from the matrix, storing the analogue quantities related with the pixels of the selected group of pixels into analogue storing means (14) and averaging the stored analogue quantities to obtain an analogue quantity corresponding to an average pixel luminance value.
Abstract:
A solid state image sensor has a pixel array (80) of active pixel type using three transistors plus a photodiode per pixel. Pixel reset values are read out one row at a time and stored in a frame store (83). Pixel signal values are read out a row at a time. The stored reset values are subtracted, for example by a read/write/modify circuit (84) to remove kTC noise. The readout of reset and signal values for are interleaved, and the offset between read and reset for each row is selected to control frame exposure.
Abstract:
An image sensor array 12 of active pixel elements 17 arranged in rows and columns, where each column has an output circuit 18 for reading out pixel image signals comprising a pair of sample capacitors 34, 36, a switching means 38, 40 operable in conjunction with pixel switches 24, 26, 28 to apply pixel voltages to the sample capacitors 34, 36, and one or more optically masked pixels 19 such that output image signals obtained from said optically masked pixels 19 represent substantially only the column FPN includes image processing means 14 for recording the column FPN for each column from said optically masked pixels 19; recording the image signal from said sensor array of active pixels 17; and subtracting the column FPN column-wise from the image signal.