Test bench generator for integrated circuits, particularly memories
    1.
    发明公开
    Test bench generator for integrated circuits, particularly memories 审中-公开
    Schlerkreise,insbesonderefürSpeicher的测试员

    公开(公告)号:EP1376413A1

    公开(公告)日:2004-01-02

    申请号:EP02425415.3

    申请日:2002-06-25

    CPC classification number: G06F17/5022 Y10S707/99933

    Abstract: A computer based test bench generator (1) for verifying integrated circuits specified by models in a Hardware Description Language comprises a repository (10) storing a general set of self-checking tests applicable to the integrated circuits, means for entering behaviour data (21) of an integrated circuit model (20), means for entering configuration data (22) of the integrated circuit model and means for automatically generating test benches (30) in said Hardware Description Language, which means are configured to make a selection and setup of suitable tests from the repository according to the specified integrated circuit model, configuration and behaviour data.

    Abstract translation: 一种用于验证由硬件描述语言中的模型指定的集成电路的基于计算机的测试台发生器(1)包括存储适用于集成电路的一般的一组自检测试的存储库(10),用于输入行为数据(21)的装置 集成电路模型(20)的装置,用于输入集成电路模型的配置数据(22)的装置和用于在所述硬件描述语言中自动生成测试台(30)的装置,所述装置被配置为进行适当的选择和设置 根据指定的集成电路模型,配置和行为数据从存储库进行测试。

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