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    METHOD FOR MANUFACTURING BAW RESONATORS ON A SEMICONDUCTOR WAFER
    1.
    发明申请
    METHOD FOR MANUFACTURING BAW RESONATORS ON A SEMICONDUCTOR WAFER 有权
    在半导体波形上制造BAW谐振器的方法

    公开(公告)号：US20140075726A1

    公开(公告)日：2014-03-20

    申请号：US14084394

    申请日：2013-11-19

    Applicant: STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics SA

    Inventor： David Petit ,  Sylvain Joblot ,  Pierre Bar ,  Jean-Francois Carpentier ,  Pierre Dautriche

    IPC: H03H3/02

    CPC classification number: H03H3/02 ,  G01N29/022 ,  G02F1/133707 ,  H03H3/04 ,  H03H9/0028 ,  H03H9/02102 ,  H03H9/175 ,  Y10T29/42 ,  Y10T29/49005 ,  Y10T29/49155

    Abstract: A method for manufacturing a wafer on which are formed resonators, each resonator including, above a semiconductor substrate, a stack of layers including, in the following order from the substrate surface: a Bragg mirror; a compensation layer made of a material having a temperature coefficient of the acoustic velocity of a sign opposite to that of all the other stack layers; and a piezoelectric resonator, the method including the successive steps of: a) depositing the compensation layer; and b) decreasing thickness inequalities of the compensation layer due to the deposition method, so that this layer has a same thickness to within better than 2%, and preferably to within better than 1%, at the level of each resonator.

    Abstract translation: 一种制造晶片的方法，其上形成有谐振器，每个谐振器包括在半导体衬底上方的一叠层，其从衬底表面依次包括：布拉格反射镜; 由具有与所有其它堆叠层相反的符号的声速的温度系数的材料制成的补偿层; 和压电谐振器，该方法包括以下连续步骤：a）沉积补偿层; 和b）由于沉积方法而减小补偿层的厚度不等式，使得该层在每个谐振器的电平上具有相同的厚度，优于2％以内，优选在1％以内。

    Operating conditions compensation circuit
    3.
    发明授权
    Operating conditions compensation circuit 有权
    工作条件补偿电路

    公开(公告)号：US08981817B2

    公开(公告)日：2015-03-17

    申请号：US13926748

    申请日：2013-06-25

    Applicant: STMicroelectronics International N.V. ,  STMicroelectronics (Crolles 2) SAS

    Inventor： Vinod Kumar ,  Pradeep Kumar Badrathwal ,  Saiyid Mohammad Irshad Rizvi ,  Paras Garg ,  Kallol Chatterjee ,  Pierre Dautriche

    IPC: H03K3/00

    CPC classification number: H03K19/00384

    Abstract: A circuit having a centralized PT compensation circuit to provide compensation signals to localized I/O blocks on the chip. Process variations and temperature variations tend to be approximately uniform across an integrated circuit chip. Thus, a single, centralized PT compensation circuit may be used instead of one PT compensation circuit per I/O section as with solutions of the past. Further, the PT compensation circuit may generate a digital code indicative of the effects of process and temperature. Further yet, each section of I/O block may have a local voltage compensation circuit to compensate the voltage variation of the I/O block. The voltage compensation circuit utilizes an independent reference voltage. The reference voltage is generated by the PT compensation circuit, which is placed centrally in the IC chip and hence any need to repeat the reference generation for each I/O block is eliminated.

    Abstract translation: 具有集中PT补偿电路以向芯片上的局部I / O块提供补偿信号的电路。 整个集成电路芯片的工艺变化和温度变化趋向于大致均匀。 因此，与过去的解决方案一样，可以使用单个集中式PT补偿电路来代替每个I / O部分的一个PT补偿电路。 此外，PT补偿电路可以产生指示过程和温度的影响的数字代码。 此外，I / O块的每个部分可以具有用于补偿I / O块的电压变化的局部电压补偿电路。 电压补偿电路采用独立的参考电压。 参考电压由放置在IC芯片中央的PT补偿电路产生，因此不需要重复每个I / O块的参考生成。

    System and method for variable frequency clock generation
    4.
    发明授权
    System and method for variable frequency clock generation 有权
    用于变频时钟产生的系统和方法

    公开(公告)号：US08933737B1

    公开(公告)日：2015-01-13

    申请号：US14046041

    申请日：2013-10-04

    Applicant: STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics International N.V.

    Inventor： Kallol Chatterjee ,  Nitin Agarwal ,  Junaid Yousuf ,  Nitin Gupta ,  Pierre Dautriche

    IPC: H03L7/06 ,  H03L7/095

    CPC classification number: H03L7/095

    Abstract: A variable frequency clock generator. In aspects, a clock generator includes a droop detector circuit configured to monitor a voltage supply to an integrated circuit. If the supply voltage falls below a specific threshold, a droop voltage flag may be set such that a frequency-locked loop is triggered into a droop voltage mode for handling the voltage droop at the supply voltage. In response, a current control signal that is input to an oscillator that generates a system clock signal is reduced by sinking current away from the current control signal to the oscillator. This results in an immediate reduction on the system clock frequency. Such a state remains until the voltage droop has dissipated when the current path is removed for sinking some of the current.

    Abstract translation: 变频时钟发生器。 在方面中，时钟发生器包括下垂检测器电路，其被配置为监视对集成电路的电压供应。 如果电源电压低于特定阈值，则可以设置下降电压标志，使得频率锁定环路被触发到用于处理电源电压的电压下降的下降电压模式。 作为响应，通过将电流从电流控制信号吸收到振荡器来减小输入到产生系统时钟信号的振荡器的电流控制信号。 这将立即降低系统时钟频率。 当去除电流路径以吸收一些电流时，这种状态保持直到电压下降消散。

    DEVICE AND METHOD FOR RECEIVING DATA IN A RADIO FREQUENCY TRANSMISSION
    6.
    发明申请
    DEVICE AND METHOD FOR RECEIVING DATA IN A RADIO FREQUENCY TRANSMISSION 有权

    公开(公告)号：US20220286149A1

    公开(公告)日：2022-09-08

    申请号：US17664987

    申请日：2022-05-25

    Applicant: STMICROELECTRONICS SA

    Inventor： Pierre Dautriche ,  Sylvain Engels

    IPC: H04B1/00 ,  G06N3/02 ,  H04B1/04

    Abstract: According to one aspect, an embodiment radio frequency receiver device comprises an input interface configured to receive a radio frequency signal of a given type and convert same into an electric signal, a detector configured to detect at least one voltage level in the electric signal, a pulse generator configured to generate at least one pulse train representative of the voltage levels detected, and a processing unit configured to determine the type of the radio frequency signal from the at least one pulse train.

    Device and method for receiving data in a radio frequency transmission
    7.
    发明授权
    Device and method for receiving data in a radio frequency transmission 有权

    公开(公告)号：US11374597B2

    公开(公告)日：2022-06-28

    申请号：US17328612

    申请日：2021-05-24

    Applicant: STMicroelectronics SA

    Inventor： Pierre Dautriche ,  Sylvain Engels

    IPC: H04B1/00 ,  H04B1/04 ,  G06N3/02

    Abstract: According to one aspect, an embodiment radio frequency receiver device comprises an input interface configured to receive a radio frequency signal of a given type and convert same into an electric signal, a detector configured to detect at least one voltage level in the electric signal, a pulse generator configured to generate at least one pulse train representative of the voltage levels detected, and a processing unit configured to determine the type of the radio frequency signal from the at least one pulse train.

    Device and method for receiving data in a radio frequency transmission
    8.
    发明授权
    Device and method for receiving data in a radio frequency transmission 有权

    公开(公告)号：US11616516B2

    公开(公告)日：2023-03-28

    申请号：US17664987

    申请日：2022-05-25

    Applicant: STMICROELECTRONICS SA

    Inventor： Pierre Dautriche ,  Sylvain Engels

    IPC: H04B1/00 ,  H04B1/04 ,  G06N3/02

    Abstract: According to one aspect, an embodiment radio frequency receiver device comprises an input interface configured to receive a radio frequency signal of a given type and convert same into an electric signal, a detector configured to detect at least one voltage level in the electric signal, a pulse generator configured to generate at least one pulse train representative of the voltage levels detected, and a processing unit configured to determine the type of the radio frequency signal from the at least one pulse train.

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