Software implemented image generating pipeline using a dedicated digital signal processor
    2.
    发明公开
    Software implemented image generating pipeline using a dedicated digital signal processor 审中-公开
    使用专有的数字信号处理器软件实现成像管道

    公开(公告)号:EP1717753A3

    公开(公告)日:2010-06-02

    申请号:EP06112972.2

    申请日:2006-04-24

    CPC classification number: G06T1/60

    Abstract: An image generating pipeline (IGP) includes a digital signal processor for implementing processing blocks connected in cascade for processing an input image that includes an array of raw pixel values to generate a color image that includes an array of reconstructed pixel values. A memory is coupled to the digital signal processor for storing the raw pixel values and the array of reconstructed pixel values. The digital signal processor includes a data cache, and the raw pixel values of the input image are processed through the processing blocks in sub-arrays having fractional dimensions of the pixel dimensions of the whole image array. The sub-arrays include an input sub-array of pixel values being loaded from the memory for defining a working window. The sub-arrays of raw pixel values have a row-wise dimension of at least a fraction of a full row of the input image, and a column-wise dimension equal to or larger than a column-wise filtering action of a respective processing block to which the input sub-array is input. The digital signal processor outputs at least one fraction of full rows of completely reconstructed pixel values of the input image for storing in the memory.

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