公开(公告)号：KR20180052773A

公开(公告)日：2018-05-18

申请号：KR20187012785

申请日：2011-02-07

Applicant: SUNEDISON INC

Inventor： PITNEY JOHN A ,  YOSHIMURA ICHIRO ,  FEI LU

IPC: H01L21/02 ,  H01L21/762 ,  H01L21/84

CPC classification number: H01L21/76254 ,  H01L21/02024 ,  H01L21/02052

Abstract: 본발명은비접합영역이줄어든실리콘온 인슐레이터구조체의준비, 및핸들및 도너웨이퍼의롤-오프양(ROA)을최소화함으로써그러한웨이퍼를생성하는방법에관한것이다. 웨이퍼를연마하는방법이또한제공된다.

公开(公告)号：WO2014106190A3

公开(公告)日：2014-10-09

申请号：PCT/US2013078329

申请日：2013-12-30

Applicant: SUNEDISON INC

Inventor： FALSTER ROBERT J ,  VORONKOV VLADIMIR V ,  PITNEY JOHN A ,  ALBRECHT PETER D

IPC: H01L21/687

CPC classification number: H01L21/322 ,  C30B25/12 ,  H01L21/302 ,  H01L21/68735 ,  H01L21/6875

Abstract: Apparatus for use in preparing heterostructures having a reduced concentration of defects including apparatus for stressing semiconductor substrates to allow them to conform to a crystal having a different crystal lattice constant.

Abstract translation: 用于制备具有减少的缺陷浓度的异质结构的装置，包括用于加压半导体衬底以使其符合具有不同晶格常数的晶体的装置。

公开(公告)号：WO2014106155A3

公开(公告)日：2014-10-30

申请号：PCT/US2013078224

申请日：2013-12-30

Applicant: SUNEDISON INC

Inventor： FALSTER ROBERT J ,  VORONKOV VLADIMIR V ,  PITNEY JOHN A ,  ALBRECHT PETER D

IPC: H01L21/02 ,  H01L21/302 ,  H01L21/322 ,  H01L21/463 ,  H01L21/67 ,  H01L21/687

CPC classification number: H01L21/322 ,  C30B25/12 ,  H01L21/302 ,  H01L21/68735 ,  H01L21/6875

Abstract: Apparatus and processes for preparing heterostructures with reduced strain are disclosed. The heterostructures may include a semiconductor structure that conforms to a surface layer having a different crystal lattice constant than the structure to form a relatively low-defect heterostructure.

Abstract translation: 公开了用于制备具有减小应变的异质结构的设备和方法。 异质结构可以包括半导体结构，该半导体结构符合具有与结构不同的晶格常数的表面层以形成相对低缺陷的异质结构。