公开(公告)号：US20040097044A1

公开(公告)日：2004-05-20

申请号：US10460673

申请日：2003-06-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chung-woo Kim ,  Byung-gook Park ,  Jong-duk Lee ,  Yong-kyu Lee

IPC: H01L021/336

CPC classification number: H01L29/7926 ,  G11C11/5628 ,  H01L21/28282 ,  H01L29/66833 ,  H01L29/785 ,  H01L29/7923

Abstract: Provided are a silicon/oxide/nitride/oxide/silicon (SONOS) memory, a fabricating method thereof, and a memory programming method. The SONOS memory includes a substrate; a first insulating layer stacked on the substrate; a semiconductor layer, which is patterned on the first insulating layer in a predetermined shape, including source and drain electrodes separated by a predetermined interval; a second insulating layer located on the semiconductor layer between the source and drain electrodes; a memory layer, which is deposited on sides of a portion of the semiconductor layer between the source and drain electrodes and on sides and an upper surface of the second insulating layer, including electron transferring channels and an electron storing layer; and a gate electrode, which is deposited on a surface of the memory layer, for controlling transfer of electrons in the memory layer. The programming method may provide a large capacity, stable, multi-level memory.

Abstract translation: 提供了硅/氧化物/氮化物/氧化物/硅（SONOS）存储器，其制造方法和存储器编程方法。 SONOS存储器包括基板; 堆叠在所述基板上的第一绝缘层; 半导体层，其在预定形状的第一绝缘层上图案化，包括以预定间隔隔开的源极和漏极; 位于源极和漏极之间的半导体层上的第二绝缘层; 存储层，其沉积在源极和漏极之间的半导体层的一部分的侧面上，并且沉积在包括电子传输沟道和电子存储层的第二绝缘层的侧面和上表面上; 以及沉积在存储层的表面上用于控制存储层中电子转移的栅电极。 编程方法可以提供大容量，稳定的多级存储器。

公开(公告)号：US20030183887A1

公开(公告)日：2003-10-02

申请号：US10384495

申请日：2003-03-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Eun-sung Lee ,  Chung-woo Kim ,  In-sang Song ,  Jong-seok Kim ,  Moon-chul Lee

IPC: H01L021/00 ,  H01L027/14 ,  H01L029/82

CPC classification number: B81B3/0078 ,  B81B2201/014 ,  B81B2203/0118 ,  B81B2203/0307 ,  B81B2203/04 ,  B81C2201/0107 ,  B81C2201/014 ,  H01H59/0009

Abstract: A method for fabricating a MEMS device having a fixing part fixed to a substrate, a connecting part, a driving part, a driving electrode, and contact parts, includes patterning the driving electrode on the substrate; forming an insulation layer on the substrate; patterning the insulation layer and etching a fixing region and a contact region of the insulation layer; forming a metal layer over the substrate; planarizing the metal layer until the insulation layer is exposed; forming a sacrificial layer on the substrate; patterning the sacrificial layer to form an opening exposing a portion of the insulation layer and the metal layer in the fixing region; forming a MEMS structure layer on the sacrificial layer to partially fill the opening, thereby forming sidewalls therein; and selectively removing a portion of the sacrificial layer by etching so that a portion of the sacrificial layer remains in the fixing region.

Abstract translation: 一种用于制造具有固定到基板上的固定部件，连接部件，驱动部件，驱动电极和接触部件的MEMS器件的方法，包括在所述基板上图形化所述驱动电极; 在所述基板上形成绝缘层; 图案化绝缘层并蚀刻绝缘层的固定区域和接触区域; 在衬底上形成金属层; 平坦化金属层直到绝缘层露出; 在所述基板上形成牺牲层; 图案化牺牲层以形成露出固定区域中绝缘层和金属层的一部分的开口; 在所述牺牲层上形成MEMS结构层以部分地填充所述开口，从而在其中形成侧壁; 并且通过蚀刻选择性地去除牺牲层的一部分，使得牺牲层的一部分保留在固定区域中。

公开(公告)号：US20040264236A1

公开(公告)日：2004-12-30

申请号：US10835097

申请日：2004-04-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Soo-doo Chae ,  Chung-woo Kim ,  Jung-hyun Lee ,  Moon-kyung Kim ,  Hyun-sang Hwang

IPC: G11C011/00

CPC classification number: H01L29/792 ,  H01L21/28194 ,  H01L21/28282 ,  H01L27/11568 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66833

Abstract: A nonvolatile semiconductor memory device includes a semiconductor substrate having a source region and a drain region, and a gate stack formed on the semiconductor substrate between and in contact with the source and drain regions. The gate stack includes, in sequential order from the substrate: a tunneling film; a first trapping material film doped with a first predetermined impurity, the first trapping material film having a higher dielectric constant than the nitride film (Si3N4); a first insulating film having a higher dielectric constant than a nitride film; and a gate electrode. Such a nonvolatile semiconductor memory device can effectively control the trap density according to the doping concentration, thereby increasing the write/erase speed of data at a low operating voltage.

Abstract translation: 非易失性半导体存储器件包括具有源极区和漏极区的半导体衬底，以及形成在半导体衬底上并与源极和漏极区接触的栅堆叠。 栅极堆叠从衬底依次顺序包括：隧道膜; 掺杂有第一预定杂质的第一捕获材料膜，所述第一捕获材料膜具有比所述氮化物膜（Si 3 N 4）更高的介电常数; 具有比氮化膜更高的介电常数的第一绝缘膜; 和栅电极。 这种非易失性半导体存储器件可以根据掺杂浓度有效地控制阱密度，从而在低工作电压下增加数据的写入/擦除速度。

公开(公告)号：US20040207002A1

公开(公告)日：2004-10-21

申请号：US10753772

申请日：2004-01-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Won-il Ryu ,  Jo-won Lee ,  Se-wook Yoon ,  Chung-woo Kim

IPC: H01L029/788

CPC classification number: H01L29/66833 ,  H01L21/28273 ,  H01L21/28282 ,  H01L29/42328 ,  H01L29/7881 ,  H01L29/792 ,  H01L29/7923

Abstract: In a silicon-oxide-nitride-oxide-silicon (SONOS) memory device and a method of manufacturing the same, a SONOS memory device includes a semiconductor substrate, an insulating layer deposited on the semiconductor substrate, an active layer formed on a predetermined region of the insulating layer and divided into a source region, a drain region, and a channel region, a first side gate stack formed at a first side of the channel region, and a second side gate stack formed at a second side of the channel region opposite the first side of the channel region. In the SONOS memory device, at least two bits of data may be stored in each SONOS memory device, thereby allowing the integration density of the semiconductor memory device to be increased without increasing an area thereof.

Abstract translation: 在氧化硅 - 氧化物 - 氧化物 - 硅（SONOS）存储器件及其制造方法中，SONOS存储器件包括半导体衬底，沉积在半导体衬底上的绝缘层，形成在预定区域上的有源层 并且被分成源区域，漏极区域和沟道区域，形成在沟道区域的第一侧的第一侧栅叠层和形成在沟道区域的第二侧的第二侧栅叠层 与通道区域的第一侧相对。 在SONOS存储器件中，可以在每个SONOS存储器件中存储至少两位数据，从而允许半导体存储器件的集成密度增加而不增加其面积。

公开(公告)号：US20040155306A1

公开(公告)日：2004-08-12

申请号：US10773312

申请日：2004-02-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Eun-sung Lee ,  Chung-woo Kim ,  In-sang Song ,  Jong-seok Kim ,  Moon-chul Lee

IPC: H01L027/14

CPC classification number: B81B3/0078 ,  B81B2201/014 ,  B81B2203/0118 ,  B81B2203/0307 ,  B81B2203/04 ,  B81C2201/0107 ,  B81C2201/014 ,  H01H59/0009

Abstract: A method for fabricating a MEMS device having a fixing part fixed to a substrate, a connecting part, a driving part, a driving electrode, and contact parts, includes patterning the driving electrode on the substrate; forming an insulation layer on the substrate; patterning the insulation layer and etching a fixing region and a contact region of the insulation layer; forming a metal layer over the substrate; planarizing the metal layer until the insulation layer is exposed; forming a sacrificial layer on the substrate; patterning the sacrificial layer to form an opening exposing a portion of the insulation layer and the metal layer in the fixing region; forming a MEMS structure layer on the sacrificial layer to partially fill the opening, thereby forming sidewalls therein; and selectively removing a portion of the sacrificial layer by etching so that a portion of the sacrificial layer remains in the fixing region.

Abstract translation: 一种用于制造具有固定到基板上的固定部件，连接部件，驱动部件，驱动电极和接触部件的MEMS器件的方法，包括在所述基板上图形化所述驱动电极; 在所述基板上形成绝缘层; 图案化绝缘层并蚀刻绝缘层的固定区域和接触区域; 在衬底上形成金属层; 使金属层平坦化直到绝缘层露出; 在所述基板上形成牺牲层; 图案化牺牲层以形成露出固定区域中绝缘层和金属层的一部分的开口; 在所述牺牲层上形成MEMS结构层以部分地填充所述开口，从而在其中形成侧壁; 并且通过蚀刻选择性地去除牺牲层的一部分，使得牺牲层的一部分保留在固定区域中。