公开(公告)号：US20030153151A1

公开(公告)日：2003-08-14

申请号：US10225431

申请日：2002-08-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Won-bong Choi ,  Soo-doo Chae

IPC: H01L021/336 ,  H01L029/788

CPC classification number: B82Y10/00 ,  H01L21/28273 ,  H01L21/28282 ,  H01L29/42332 ,  H01L29/7881 ,  H01L29/7883 ,  Y10S977/943

Abstract: Provided is a memory device formed using quantum devices and a method for manufacturing the same. A memory device comprises a substrate; a source region and a drain region formed in the substrate so as to be separated from each other by a predetermined interval; a memory cell which is formed on the surface of the substrate to connect the source region and the drain region, and has a plurality of nano-sized quantum dots filled with material for storing electrons; and a control gate which is formed on the memory cell and controls the number of electrons stored in the memory cell. It is possible to embody a highly efficient and highly integrated memory device by providing a memory device having nano-sized quantum dots and a method for manufacturing the same.

Abstract translation: 提供了使用量子器件形成的存储器件及其制造方法。 存储器件包括衬底; 源极区域和漏极区域，形成在所述衬底中，以便以预定间隔彼此分离; 存储单元，其形成在所述基板的表面上，以连接所述源极区域和所述漏极区域，并且具有填充有用于存储电子的材料的多个纳米尺寸的量子点; 以及形成在存储单元上并控制存储在存储单元中的电子数的控制栅极。 通过提供具有纳米尺寸量子点的存储器件及其制造方法，可以实现高效率和高度集成的存储器件。

公开(公告)号：US20040264236A1

公开(公告)日：2004-12-30

申请号：US10835097

申请日：2004-04-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Soo-doo Chae ,  Chung-woo Kim ,  Jung-hyun Lee ,  Moon-kyung Kim ,  Hyun-sang Hwang

IPC: G11C011/00

CPC classification number: H01L29/792 ,  H01L21/28194 ,  H01L21/28282 ,  H01L27/11568 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66833

Abstract: A nonvolatile semiconductor memory device includes a semiconductor substrate having a source region and a drain region, and a gate stack formed on the semiconductor substrate between and in contact with the source and drain regions. The gate stack includes, in sequential order from the substrate: a tunneling film; a first trapping material film doped with a first predetermined impurity, the first trapping material film having a higher dielectric constant than the nitride film (Si3N4); a first insulating film having a higher dielectric constant than a nitride film; and a gate electrode. Such a nonvolatile semiconductor memory device can effectively control the trap density according to the doping concentration, thereby increasing the write/erase speed of data at a low operating voltage.

Abstract translation: 非易失性半导体存储器件包括具有源极区和漏极区的半导体衬底，以及形成在半导体衬底上并与源极和漏极区接触的栅堆叠。 栅极堆叠从衬底依次顺序包括：隧道膜; 掺杂有第一预定杂质的第一捕获材料膜，所述第一捕获材料膜具有比所述氮化物膜（Si 3 N 4）更高的介电常数; 具有比氮化膜更高的介电常数的第一绝缘膜; 和栅电极。 这种非易失性半导体存储器件可以根据掺杂浓度有效地控制阱密度，从而在低工作电压下增加数据的写入/擦除速度。