公开(公告)号：US20230189316A1

公开(公告)日：2023-06-15

申请号：US17547396

申请日：2021-12-10

Applicant: Silicon Laboratories Inc.

Inventor： Sriram Mudulodu ,  Manoj Kumar Medam ,  Rambabu Katla ,  Anil Kumar Adavally ,  Aravinth Kumar Ayyappannair Radhadevi

IPC: H04W72/08

CPC classification number: H04W72/085

Abstract: In one embodiment, an apparatus includes: a compensation circuit to select one of a plurality of compensation sets based on an allocated resource unit (RU) and compensate a digital complex signal using the selected compensation set; a digital-to-analog converter to convert the compensated digital complex signal to a compensated analog complex signal; a mixer coupled to the digital-to-analog converter to upconvert the compensated analog complex signal to a radio frequency (RF) signal; and a power amplifier coupled to the mixer to amplify the RF signal.

公开(公告)号：US20250007630A1

公开(公告)日：2025-01-02

申请号：US18344116

申请日：2023-06-29

Applicant: Silicon Laboratories Inc.

Inventor： Sriram Mudulodu ,  Manoj Kumar Medam

IPC: H04B17/318 ,  H04L27/00

Abstract: In one embodiment, a receiver includes: an analog front end (AFE) circuit to receive and process an incoming radio frequency (RF) analog signal comprising a packet; an analog-to-digital converter (ADC) coupled to the AFE circuit to receive and digitize an analog signal based on the RF analog signal into a digital signal; a packet detector coupled to the ADC to detect the packet based on the digital signal; and a computation circuit coupled to the packet detector. The computation circuit may be configured to determine a received signal strength indicator (RSSI) value based at least in part on a portion of a preamble of the packet.

公开(公告)号：US20240333316A1

公开(公告)日：2024-10-03

申请号：US18322639

申请日：2023-05-24

Applicant: Silicon Laboratories Inc.

Inventor： Sriram Mudulodu ,  Manoj Kumar Medam ,  Rambabu Katla

IPC: H04B1/00 ,  H04B1/12

CPC classification number: H04B1/0028 ,  H04B1/12

Abstract: A receiver includes: an analog front end (AFE) circuit to receive and process an incoming radio frequency (RF) signal comprising a packet; an analog-to-digital converter (ADC) to receive and digitize the processed incoming RF signal into a digital signal; a packet detector to detect the packet; an estimation circuit to determine a carrier frequency offset (CFO) estimate based at least in part on a preamble of the packet; an averager to determine a CFO average value for a plurality of packets communicated between a device pair combination of the receiver and a transmitter; and a compensation circuit to compensate for CFO between the device pair combination based at least in part on the CFO average value.

公开(公告)号：US11632733B2

公开(公告)日：2023-04-18

申请号：US17472935

申请日：2021-09-13

Applicant: Silicon Laboratories Inc.

Inventor： Sriram Mudulodu ,  Manoj Kumar Medam

IPC: H04L27/28 ,  H04W56/00

Abstract: In one aspect, a radio device comprises: an analog front end (AFE) circuit to receive and process an incoming radio frequency (RF) signal comprising a packet; an analog-to-digital converter (ADC) coupled to the AFE circuit to receive and digitize the processed incoming RF signal into a digital signal; a detector coupled to the ADC to detect a carrier frequency offset (CFO) in the digital signal based at least in part on a preamble of the packet; and a controller coupled to the detector. The controller may generate a compensation value for the CFO based on the detected CFO and cause one or more components of the radio device to compensate for the CFO using the compensation value.

公开(公告)号：US20230077766A1

公开(公告)日：2023-03-16

申请号：US17472935

申请日：2021-09-13

Applicant: Silicon Laboratories Inc.

Inventor： Sriram Mudulodu ,  Manoj Kumar Medam

IPC: H04W56/00

Abstract: In one aspect, a radio device comprises: an analog front end (AFE) circuit to receive and process an incoming radio frequency (RF) signal comprising a packet; an analog-to-digital converter (ADC) coupled to the AFE circuit to receive and digitize the processed incoming RF signal into a digital signal; a detector coupled to the ADC to detect a carrier frequency offset (CFO) in the digital signal based at least in part on a preamble of the packet; and a controller coupled to the detector. The controller may generate a compensation value for the CFO based on the detected CFO and cause one or more components of the radio device to compensate for the CFO using the compensation value.