公开(公告)号：US10757652B2

公开(公告)日：2020-08-25

申请号：US16221325

申请日：2018-12-14

Applicant: Silicon Laboratories Inc.

Inventor： Sriram Mudulodu ,  Partha Sarathy Murali ,  SuryaNarayana Varma Nallaparaju ,  Logeshwaran Vijayan ,  Subba Reddy Kallam ,  Venkat Mattela

IPC: H04W52/02 ,  H04B1/16 ,  H04W40/24 ,  H04W84/12

Abstract: A wireless receiver powers up shortly before the expected arrival of a beacon frame, and upon detection of a beacon frame from an access point the station is associated with and determination of subsequent fields of interest, including at least a TIM field, the receiver powers down. At the previously identified fields of interest, the receiver powers up and uses previously stored values to continue packet demodulation, thereafter examining the TIM field to determine whether the AP has packets to transmit to the station.

公开(公告)号：US12034551B2

公开(公告)日：2024-07-09

申请号：US18195802

申请日：2023-05-10

Applicant: Silicon Laboratories Inc.

Inventor： Partha Sarathy Murali ,  Ajay Mantha ,  Nagaraj Reddy Anakala ,  Subba Reddy Kallam ,  Venkat Mattela

IPC: H04L12/12 ,  H04W4/80 ,  H04W84/12 ,  H04W84/18

CPC classification number: H04L12/12 ,  H04W4/80 ,  H04W84/12 ,  H04W84/18

Abstract: A mesh receiver has a wakeup receiver for reception of a wakeup sequence formed by keyed RF or a sequence of wireless packets and gaps, a transmitter forming low speed RF wakeup sequence to other mesh stations, a mesh receiver for reception of high speed WLAN packets, the transmitter sending a wireless ACK packet in response to a wakeup sequence, the mesh receiver thereafter receiving wireless packets from a remote station, the mesh transmitter sending an ACK, the mesh station thereafter identifying a next hop station, and sending a wakeup sequence to that station, after receipt of an ACK, sending the data, the mesh receiver and mesh transmitter thereafter going to sleep.

公开(公告)号：US11665008B2

公开(公告)日：2023-05-30

申请号：US17692027

申请日：2022-03-10

Applicant: Silicon Laboratories Inc.

Inventor： Partha Sarathy Murali ,  Ajay Mantha ,  Nagaraj Reddy Anakala ,  Subba Reddy Kallam ,  Venkat Mattela

IPC: H04L12/12 ,  H04W84/12 ,  H04W4/80 ,  H04W84/18

CPC classification number: H04L12/12 ,  H04W4/80 ,  H04W84/12 ,  H04W84/18

Abstract: A mesh receiver has a wakeup receiver for reception of a wakeup sequence formed by keyed RF or a sequence of wireless packets and gaps, a transmitter forming low speed RF wakeup sequence to other mesh stations, a mesh receiver for reception of high speed WLAN packets, the transmitter sending a wireless ACK packet in response to a wakeup sequence, the mesh receiver thereafter receiving wireless packets from a remote station, the mesh transmitter sending an ACK, the mesh station thereafter identifying a next hop station, and sending a wakeup sequence to that station, after receipt of an ACK, sending the data, the mesh receiver and mesh transmitter thereafter going to sleep.

公开(公告)号：US12101658B2

公开(公告)日：2024-09-24

申请号：US16945870

申请日：2020-08-02

Applicant: Silicon Laboratories Inc.

Inventor： Subba Reddy Kallam ,  Partha Murali ,  Venkat Mattela ,  Venkata Siva Prasad Pulagam

IPC: H04W28/02 ,  G06F9/30 ,  G06F9/38 ,  H04W4/80 ,  H04W16/18 ,  H04W72/54 ,  H04W72/563 ,  H04W84/12

CPC classification number: H04W28/0231 ,  G06F9/30098 ,  G06F9/3836 ,  H04W4/80 ,  H04W16/18 ,  H04W72/54 ,  H04W72/563 ,  H04W84/12

Abstract: A multi-thread communication system has several communications processors operative over a single interface for transmitting and receiving packets. The multi-thread communications processor is operative to sequentially handle multiple thread processes for each communications processor on a cycle by cycle basis according to a thread map register which determines the order of execution and how many cycles of a particular thread occur during a canonical interval.

公开(公告)号：US11129098B2

公开(公告)日：2021-09-21

申请号：US16599872

申请日：2019-10-11

Applicant: Silicon Laboratories Inc.

Inventor： Venkat Mattela ,  Partha Sarathy Murali ,  Ajay Mantha

IPC: H04W4/80 ,  H04W52/02 ,  H04B1/44 ,  H04B1/00 ,  H04L27/34 ,  H04L25/03 ,  H04L12/28 ,  H04W84/12 ,  H04W88/06

Abstract: A transmit/receive signal processor for Wireless Local Area Network (WLAN) and Bluetooth has selectable signal processing elements for mixers, Intermediate Frequency (IF) filters, transmit power amplifiers, and clock sources which are suitable for either Bluetooth or WLAN signal processing. The operating mode of the signal processor is selected to be one of Wireless High Performance, Wireless Low Power, Bluetooth High Performance or Bluetooth Low power, and the signal processing modules are selected to provide performance or power requirements using selected modules.

公开(公告)号：US11112847B2

公开(公告)日：2021-09-07

申请号：US17006811

申请日：2020-08-29

Applicant: Silicon Laboratories Inc.

Inventor： Partha Sarathy Murali ,  Subba Reddy Kallam ,  Venkat Mattela

IPC: G06F1/3228 ,  G06F1/3234 ,  G06F9/54 ,  H04L29/12 ,  H04W4/12 ,  H04W4/80 ,  H04L12/58 ,  G06F9/445 ,  H04B1/00 ,  H04B1/04

Abstract: A communications system has a low power connectivity processor and a high performance applications processor. The low power connectivity processor is coupled to a low power front end for wireless packets and the high performance applications processor is coupled to a high performance front end. A power controller is coupled to the low power front end and enables the applications processor and high performance front end when wireless packets which require greater processing capacity are received, and removes power from the applications processor and high performance front end at other times.

公开(公告)号：US10911419B2

公开(公告)日：2021-02-02

申请号：US15943542

申请日：2018-04-02

Applicant: Silicon Laboratories Inc.

Inventor： Sriram Mudulodu ,  Venkat Mattela

IPC: H04L29/06 ,  H04L12/801 ,  H04L12/733 ,  H04L12/46

Abstract: An apparatus and method for encrypting messages from a first node splits the message into a plurality of message units, each of which is encrypted. The encrypted message units are split into path units, each of which is directed to a different route path to a destination node. At the destination node, the path units are received and reassembled into encrypted message units, which are decrypted into message fragments and concatenated to form a message corresponding to the original one sent.

公开(公告)号：US12045645B2

公开(公告)日：2024-07-23

申请号：US16945871

申请日：2020-08-02

Applicant: Silicon Laboratories Inc.

Inventor： Subba Reddy Kallam ,  Partha Sarathy Murali ,  Venkat Mattela ,  Venkata Siva Prasad Pulagam

IPC: G06F9/48 ,  G06F9/30 ,  G06F9/38 ,  G06F9/50 ,  H04L49/90 ,  H04L65/60 ,  H04W4/80 ,  H04W12/06 ,  H04W80/02 ,  H04W80/04

CPC classification number: G06F9/4812 ,  G06F9/30101 ,  G06F9/3822 ,  G06F9/3836 ,  G06F9/5061 ,  H04L49/90 ,  H04L65/60 ,  H04W4/80 ,  H04W12/06 ,  H04W80/02 ,  H04W80/04

Abstract: A communication processor is operative to adapt the thread allocation to communications processes handled by a multi-thread processor on an instruction by instruction basis. A thread map register controls the allocation of each processor cycle to a particular thread, and the thread map register is reprogrammed as the network process loads for a plurality of communications processors such as WLAN, Bluetooth, Zigbee, or LTE have load requirements which increase or decrease. A thread management process may dynamically allocate processor cycles to each respective process during times of activity for each associated communications process.

公开(公告)号：US11537190B2

公开(公告)日：2022-12-27

申请号：US17006813

申请日：2020-08-29

Applicant: Silicon Laboratories Inc.

Inventor： Partha Sarathy Murali ,  Subba Reddy Kallam ,  Venkat Mattela

IPC: G06F1/32 ,  G06F1/3228 ,  G06F1/3234 ,  G06F9/54 ,  H04W4/12 ,  H04W4/80 ,  G06F9/445 ,  H04B1/00 ,  H04B1/04 ,  H04L51/58 ,  H04L101/622 ,  G06F1/3203

Abstract: A task processor has a low power connectivity processor and a high performance applications processor. Software processes have a component operative on a connectivity processor and a component operative on an applications processor. The low power connectivity processor is coupled to a low power front end for wireless packets and the high performance applications processor is coupled to a high performance front end. A power controller is coupled to the low power front end and enables the applications processor and high performance front end when wireless packets which require greater processing capacity are received, and removes power from the applications processor and high performance front end at other times.

公开(公告)号：US11310063B2

公开(公告)日：2022-04-19

申请号：US16918342

申请日：2020-07-01

Applicant: Silicon Laboratories Inc.

Inventor： Partha Sarathy Murali ,  Ajay Mantha ,  Nagaraj Reddy Anakala ,  Subba Reddy Kallam ,  Venkat Mattela

IPC: H04L12/12 ,  H04W84/12 ,  H04W4/80 ,  H04W84/18

Abstract: A mesh receiver has a wakeup receiver for reception of a wakeup sequence formed by keyed RF or a sequence of wireless packets and gaps, a transmitter forming low speed RF wakeup sequence to other mesh stations, a mesh receiver for reception of high speed WLAN packets, the transmitter sending a wireless ACK packet in response to a wakeup sequence, the mesh receiver thereafter receiving wireless packets from a remote station, the mesh transmitter sending an ACK, the mesh station thereafter identifying a next hop station, and sending a wakeup sequence to that station, after receipt of an ACK, sending the data, the mesh receiver and mesh transmitter thereafter going to sleep.