1.
    发明专利
    未知

    公开(公告)号:NO833922L

    公开(公告)日:1984-04-30

    申请号:NO833922

    申请日:1983-10-27

    Abstract: A plurality of multiprocessor systems (a, b ...n) is arranged in a high speed network to allow any processor (10) in one system to communicate with any processor (10) in another system. The network may be configured as a multi- node dual bidirectional ring having a multiprocessor system at each node (18, 20). Packets of information can be passed around the ring in either of two directions and are temporarily stored in buffer memory locations dedicated to a selected destination processor (10) in a selected direction between each successive transfer between neighbouring nodes (18, 20). The buffer locations are managed so that a node (18, 20) can request an adjacent node (18, 20) to stop transmitting packets if the buffer is becoming full from that direction and request resumption of transmission of packets as the buffer empties.

    MULTIPROCESSOR MULTISYSTEM COMMUNICATIONS NETWORK

    公开(公告)号:GB2133188A

    公开(公告)日:1984-07-18

    申请号:GB8328893

    申请日:1983-10-28

    Abstract: A plurality of multiprocessor systems (a, b ...n) is arranged in a high speed network to allow any processor (10) in one system to communicate with any processor (10) in another system. The network may be configured as a multi- node dual bidirectional ring having a multiprocessor system at each node (18, 20). Packets of information can be passed around the ring in either of two directions and are temporarily stored in buffer memory locations dedicated to a selected destination processor (10) in a selected direction between each successive transfer between neighbouring nodes (18, 20). The buffer locations are managed so that a node (18, 20) can request an adjacent node (18, 20) to stop transmitting packets if the buffer is becoming full from that direction and request resumption of transmission of packets as the buffer empties.

    MULTIPROCESSOR SYSTEM
    3.
    发明专利

    公开(公告)号:AU2066383A

    公开(公告)日:1984-05-03

    申请号:AU2066383

    申请日:1983-10-27

    Abstract: A plurality of multiprocessor systems (a, b ...n) is arranged in a high speed network to allow any processor (10) in one system to communicate with any processor (10) in another system. The network may be configured as a multi- node dual bidirectional ring having a multiprocessor system at each node (18, 20). Packets of information can be passed around the ring in either of two directions and are temporarily stored in buffer memory locations dedicated to a selected destination processor (10) in a selected direction between each successive transfer between neighbouring nodes (18, 20). The buffer locations are managed so that a node (18, 20) can request an adjacent node (18, 20) to stop transmitting packets if the buffer is becoming full from that direction and request resumption of transmission of packets as the buffer empties.

    5.
    发明专利
    未知

    公开(公告)号:NO167341B

    公开(公告)日:1991-07-15

    申请号:NO833922

    申请日:1983-10-27

    Abstract: A plurality of multiprocessor systems (a, b ...n) is arranged in a high speed network to allow any processor (10) in one system to communicate with any processor (10) in another system. The network may be configured as a multi- node dual bidirectional ring having a multiprocessor system at each node (18, 20). Packets of information can be passed around the ring in either of two directions and are temporarily stored in buffer memory locations dedicated to a selected destination processor (10) in a selected direction between each successive transfer between neighbouring nodes (18, 20). The buffer locations are managed so that a node (18, 20) can request an adjacent node (18, 20) to stop transmitting packets if the buffer is becoming full from that direction and request resumption of transmission of packets as the buffer empties.

    6.
    发明专利
    未知

    公开(公告)号:DK490783A

    公开(公告)日:1984-04-29

    申请号:DK490783

    申请日:1983-10-26

    Abstract: A plurality of multiprocessor systems (a, b ...n) is arranged in a high speed network to allow any processor (10) in one system to communicate with any processor (10) in another system. The network may be configured as a multi- node dual bidirectional ring having a multiprocessor system at each node (18, 20). Packets of information can be passed around the ring in either of two directions and are temporarily stored in buffer memory locations dedicated to a selected destination processor (10) in a selected direction between each successive transfer between neighbouring nodes (18, 20). The buffer locations are managed so that a node (18, 20) can request an adjacent node (18, 20) to stop transmitting packets if the buffer is becoming full from that direction and request resumption of transmission of packets as the buffer empties.

    7.
    发明专利
    未知

    公开(公告)号:DK490783D0

    公开(公告)日:1983-10-26

    申请号:DK490783

    申请日:1983-10-26

    Abstract: A plurality of multiprocessor systems (a, b ...n) is arranged in a high speed network to allow any processor (10) in one system to communicate with any processor (10) in another system. The network may be configured as a multi- node dual bidirectional ring having a multiprocessor system at each node (18, 20). Packets of information can be passed around the ring in either of two directions and are temporarily stored in buffer memory locations dedicated to a selected destination processor (10) in a selected direction between each successive transfer between neighbouring nodes (18, 20). The buffer locations are managed so that a node (18, 20) can request an adjacent node (18, 20) to stop transmitting packets if the buffer is becoming full from that direction and request resumption of transmission of packets as the buffer empties.

    8.
    发明专利
    未知

    公开(公告)号:DK167416B1

    公开(公告)日:1993-10-25

    申请号:DK490783

    申请日:1983-10-26

    Abstract: A plurality of multiprocessor systems (a, b ...n) is arranged in a high speed network to allow any processor (10) in one system to communicate with any processor (10) in another system. The network may be configured as a multi- node dual bidirectional ring having a multiprocessor system at each node (18, 20). Packets of information can be passed around the ring in either of two directions and are temporarily stored in buffer memory locations dedicated to a selected destination processor (10) in a selected direction between each successive transfer between neighbouring nodes (18, 20). The buffer locations are managed so that a node (18, 20) can request an adjacent node (18, 20) to stop transmitting packets if the buffer is becoming full from that direction and request resumption of transmission of packets as the buffer empties.

    9.
    发明专利
    未知

    公开(公告)号:FI80975B

    公开(公告)日:1990-04-30

    申请号:FI833922

    申请日:1983-10-26

    Abstract: A plurality of multiprocessor systems (a, b ...n) is arranged in a high speed network to allow any processor (10) in one system to communicate with any processor (10) in another system. The network may be configured as a multi- node dual bidirectional ring having a multiprocessor system at each node (18, 20). Packets of information can be passed around the ring in either of two directions and are temporarily stored in buffer memory locations dedicated to a selected destination processor (10) in a selected direction between each successive transfer between neighbouring nodes (18, 20). The buffer locations are managed so that a node (18, 20) can request an adjacent node (18, 20) to stop transmitting packets if the buffer is becoming full from that direction and request resumption of transmission of packets as the buffer empties.

    MULTIPROCESSOR SYSTEM
    10.
    发明专利

    公开(公告)号:AU560977B2

    公开(公告)日:1987-04-30

    申请号:AU2066383

    申请日:1983-10-27

    Abstract: A plurality of multiprocessor systems (a, b ...n) is arranged in a high speed network to allow any processor (10) in one system to communicate with any processor (10) in another system. The network may be configured as a multi- node dual bidirectional ring having a multiprocessor system at each node (18, 20). Packets of information can be passed around the ring in either of two directions and are temporarily stored in buffer memory locations dedicated to a selected destination processor (10) in a selected direction between each successive transfer between neighbouring nodes (18, 20). The buffer locations are managed so that a node (18, 20) can request an adjacent node (18, 20) to stop transmitting packets if the buffer is becoming full from that direction and request resumption of transmission of packets as the buffer empties.

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