公开(公告)号：KR880000577B1

公开(公告)日：1988-04-15

申请号：KR830000173

申请日：1983-01-18

Applicant: TANDEM COMPUTERS INC

Inventor： HUMPREY RICHARD A ,  FISHER STEVEN D ,  WIERENGA STEVEN W ,  SJOSTEDT JON

IPC: G06F12/00 ,  G06F11/00 ,  G06F11/10 ,  G06F11/30 ,  G06F12/16 ,  G11C29/02 ,  G06F13/00

公开(公告)号：JPH10336019A

公开(公告)日：1998-12-18

申请号：JP9348898

申请日：1998-04-06

Applicant: TANDEM COMPUTERS INC

Inventor： MIROV RUSSELL N ,  LE DUC NGOC ,  MIKALAUSKAS FRANK ,  GREBENKEMPER C JOHN ,  KWAN KINYING

IPC: G06F1/12 ,  G06F1/06 ,  G06F11/16 ,  H03K5/15 ,  H03L7/00

Abstract: PROBLEM TO BE SOLVED: To obtain clock generator system that generates many clock signals having different frequencies by providing a pair of clock generating units of substantially the same configuration. SOLUTION: A pair of clock generating units of substantially the same configuration 12a (master) and 12b (shadow) are provided. The configuration of the two units 12a and 12b is substantially the same and for example, the master unit 12a receives a clock signal (by way of a buffer 22) being the product of a clock oscillator 20 to input receiving circuits 16 and 18. The circuit 16 directly receives the clock and forms EARLY CLK from there. On the other hand, the circuit 18 receives a clock signal, which is delayed to three nanosecond by a (variable) delay line 24 in spite of the same clock signal and forms a clock signal ON TIME CLOCK from there.

公开(公告)号：JPH10149286A

公开(公告)日：1998-06-02

申请号：JP24621797

申请日：1997-08-26

Applicant: TANDEM COMPUTERS INC

Inventor： LYON JAMES M

IPC: G06F12/00 ,  G06F9/44 ,  G06F9/46

Abstract: PROBLEM TO BE SOLVED: To efficiently manage a transaction. SOLUTION: A client computer 10 prepares a new transaction and requests the link of an object. A client supplies the combination of a coordinator object and a recovery coordinator object to respective server computers 20, 30, 40. Within the call of an object, a resource is prepared and registered together with the coordinator object of the client. By the method, the coordinator object is returned to the client, answer is given and the coordinator object of the server is supplied. Thus the coordinator object is tacitly registered in the client computer 10. When the transaction is followed by a call to another object, the client supplies not its coordinator object but the coordinate object of a 1st server to its succeeding server.

公开(公告)号：JPH10143423A

公开(公告)日：1998-05-29

申请号：JP20228297

申请日：1997-07-11

Applicant: TANDEM COMPUTERS INC

Inventor： ERLENKOETTER ANSGAR ,  DE BORST JEROEN PETER ,  BONHAM PETER

IPC: G06F13/00 ,  G06F9/46 ,  G06F12/00 ,  G06F17/30

Abstract: PROBLEM TO BE SOLVED: To efficiently manage many objects by managing the objects through a hyper medium like a worldwide web(WWW) by a user. SOLUTION: A computer system 100 is constituted of a first computer 110 and a second computer 120 and the computers 110 and 120 are connected with each other through a line 106 which can be a LAN, a WAN or internet connection. In this case, a WWW hyper medium system is used. When the request of a hyper medium format is received, the request of the hyper medium format is converted to an object request. When the object request is sent to an object manager and a response from the object manager is received, the response from the object manager is converted to the hyper medium format.

公开(公告)号：JPH09204338A

公开(公告)日：1997-08-05

申请号：JP888396

申请日：1996-01-23

Applicant: TANDEM COMPUTERS INC

Inventor： JIEEMUZU EI RAIAN ,  SUTEIIBUN AARU PIASON ,  FURANKO PUTSUTOZORU

IPC: G06F12/00

Abstract: PROBLEM TO BE SOLVED: To speed up the restoration of fault in a data processing system by scanning an interrupted operation record backward from a common log at the time of the occurrence of fault and writing a corresponding compensation log entry forward in the common log. SOLUTION: The common log is formed by the log synthesis of an independent resource manager. During restoring processing, this log is scanned in backward order, and a count value is increased and the entry of the compensation log is written forward in the log for every compensation operation. When the count value becomes equal to a present value, a next AND record is written forward in the log including the record-id of the present log record in the middle of compensation. Until the recode provided with record-id in the middle of next AND recording, all the record is neglected. Consequently, the entry of the compensation log of a next ANDed record within the log is neglected to prevent exceeding AND processing.

公开(公告)号：JPH09128356A

公开(公告)日：1997-05-16

申请号：JP14527896

申请日：1996-06-07

Applicant: TANDEM COMPUTERS INC

Inventor： ROBAATO DABURIYUU HOOSUTO ,  DEIBUITSUDO JIEI GAASHIA ,  UIRIAMU PATAASON BANTON ,  UIRIAMU EFU BURUTSUKAATO ,  DANIERU ERU FUAURAA ,  KAATEISU UIIRAADO JIYOONZU JIY ,  DEIBUITSUDO POORU SOONIA ,  UIRIAMU JIYOERU WATOSON ,  FURANKU EI UIRIAMUSU

IPC: G06F11/18 ,  G01R31/317 ,  G01R31/3185 ,  G06F1/12 ,  G06F9/52 ,  G06F11/00 ,  G06F11/10 ,  G06F11/16 ,  G06F11/20 ,  G06F11/273 ,  G06F12/08 ,  G06F12/14 ,  G06F12/16 ,  G06F13/00 ,  H04L12/56 ,  H04L29/14 ,  G06F15/163 ,  G06F15/16

Abstract: PROBLEM TO BE SOLVED: To add no delay to access by providing an error inspecting function and performing error inspection by an interface so that no influence is exerted on performance. SOLUTION: A data processing system 10 is equipped with two subprocessor systems 10A and 10B which have substantially the same structure and functions. Each of the subprocessor systems 10A and 10B includes a central processing unit(CPU) 12, a router 14, and plural I/O packet interfaces 16 coupled with many I/O devices 17. The pair of CPUs 12 is each equipped with an interface device. Those interface devices receive specific parts of N-bit data words from the other interface devices to which an error signal detected by miscomparison should be asserted and compare them with specific parts of N-bit data words received from the corresponding CPUs 12.

公开(公告)号：JPH09128349A

公开(公告)日：1997-05-16

申请号：JP14555096

申请日：1996-06-07

Applicant: TANDEM COMPUTERS INC

Inventor： ROBAATO DABURIYUU HOOSUTO ,  DEIBUITSUDO JIEI GAASHIA

IPC: G06F11/18 ,  G01R31/317 ,  G01R31/3185 ,  G06F1/12 ,  G06F9/52 ,  G06F11/00 ,  G06F11/10 ,  G06F11/16 ,  G06F11/20 ,  G06F11/273 ,  G06F12/08 ,  G06F12/14 ,  G06F12/16 ,  G06F13/00 ,  H04L12/56 ,  H04L29/14 ,  G06F15/16

Abstract: PROBLEM TO BE SOLVED: To facilitate fault-tolerant operation by providing a network which mutually connects a central processor and an input/output device so that one of central processors gains communication access to one of input/output devices without requesting other's use. SOLUTION: The MPs 18 of subprocessor systems 10A and 10B connect an IEEE1149. one-test bus 17 registers used by the MPs 18 to elements of the subprocessor systems thorugh on-line access port interfaces included in the elements so as to transmit states and control information between the elements and MPs 18. The MPs 18 generate and send message packets to communicate with a CPU 12. The CPU 12, a router 14, and an I/O packet interface 16 are mutually connected by a TNet link L and have a two-way data communication.

公开(公告)号：JP2564601B2

公开(公告)日：1996-12-18

申请号：JP9332888

申请日：1988-04-15

Applicant: TANDEM COMPUTERS INC

Inventor： DEIUITSUDO JEI GAASHIA

IPC: G11C11/401 ,  G01R31/319 ,  G11C29/00 ,  G11C29/14 ,  G11C29/32 ,  G11C29/48

公开(公告)号：JP2539898B2

公开(公告)日：1996-10-02

申请号：JP28869988

申请日：1988-11-15

Applicant: TANDEM COMPUTERS INC

Inventor： OORANGUZEBU KEI KAAN

IPC: H03K19/013 ,  H03K19/0175 ,  H03K19/018 ,  H03K19/082

Abstract: The present invention provides a circuit for driving a TTL bus from an ECL circuit. The circuit of the present invention speeds up the "tri-state" to "active" transition by eliminating the need to pass the tri-state signal through a translator and buffer. A tri-state control circuit (13) accepts true ECL input directly, thus eliminating the delay, power and density "cost" of the translator and buffer circuits. This circuit further improves the delay performance of tri-state/active transitions by restricting device saturation to low levels.

公开(公告)号：JPH0856100A

公开(公告)日：1996-02-27

申请号：JP11828295

申请日：1995-05-17

Applicant: TANDEM COMPUTERS INC

Inventor： UIRIAMU JIEI ABUERII ,  JIYON ESU SUI ,  DEIBUITSUDO EMU TEIICHIEIN

IPC: B23P21/00 ,  H05K3/32 ,  H05K13/00 ,  H05K13/04

Abstract: PURPOSE: To provide a device for exactly aligning and mounting surface mount electric parts on a printed circuit board. CONSTITUTION: A base plate 12 having alignment elements it fitted to a circuit board 20, besides, a chuck 18 is attached to sample parts, and an alignment plate 15 is positioned to engage the alignment elements on the base plate 12. A chuck assembly 14 is formed while being affixed to the chuck 18. This is aligned to the base plate 12 and put in order at the attachment place of a circuit board 20. The chuck 18 holding parts practically equal with ones formed on the arrangement stage exactly arranges leads 26 of parts on a circuit pad on the circuit board 20 through the base plate 12 while using the alignment plate 15.