公开(公告)号：JPH07200510A

公开(公告)日：1995-08-04

申请号：JP15321194

申请日：1994-07-05

Applicant: TANDEM COMPUTERS INC

Inventor： MIZANUA MOHAMETSUDO RAAMAN ,  FURETSUDO SHII SABAANITSUKU ,  JIEFU EI SUPURAUSU ,  MAATEIN JIRI GUROOSU ,  PIITAA FUU ,  RATSUSERU MAAKU REKUTAA

IPC: G06F15/177 ,  G06F9/445 ,  G06F9/48 ,  G06F11/16 ,  G06F11/20 ,  G06F11/22 ,  G06F12/02 ,  G06F12/08 ,  G06F13/24 ,  G06F13/36 ,  G06F15/16

Abstract: PURPOSE: To connect a processor interface chip and a maintenance/diagnosis chip between two microprocessors of tandem constitution. CONSTITUTION: The processor interface chip 16 is provided with a logic pipeline- processing a microprocessor request between the microprocessors 12, 40 and a main memory 22, a logic prefetching data before the microprocessors issue a reading request, a logic generating a boot from a code within a physical memory without regard to the fixed memory positions of the microprocessors with respect to a boot code and a logic restricting the stream of interruption information through a processor bus between the microprocessors 12, 40 and the processor interface chip 16. The maintenance/diagnosis chip 14 is provided with a function stopping either one of the microprocessors when an error is detected and reading the state and is provided with a secondary cache 30.

公开(公告)号：JPH07146804A

公开(公告)日：1995-06-06

申请号：JP14900194

申请日：1994-06-30

Applicant: TANDEM COMPUTERS INC

Inventor： MIZANUA MOHAMETSUDO RAAMAN ,  FURETSUDO SHII SABAANITSUKU ,  JIEFU EI SUPURAUSU

IPC: G06F11/22 ,  G06F11/267

Abstract: PURPOSE: To provide a diagnostic system for diagnosing the state of a circuit element capable of scanning a scannable circuit without obstructing the state of an unscannable circuit for violating the protocol of a bus to which an unscannable device is attached. CONSTITUTION: A processor interface circuit is connected through a processor bus between a microprocessor and a scannable processor circuit 24 and the scannable processor is insulated from the unscannable microprocessor 22. The processor interface circuit is also scannable and a memory element for affecting the bus by preventing scanning during the use of the bus is provided. Scanning is prevented by maintenance request signals sent from a scanning controller to the processor interface circuit and maintenance approval signals sent from the processor interface circuit to the scanning controller.