METHOD AND EQUIPMENT FOR SUPPLYING DATA RETENTION TIME IN SYNCHRONOUS RANDOM ACCESS MEMORY DURING WRITING OPERATION

    公开(公告)号:JPH07141286A

    公开(公告)日:1995-06-02

    申请号:JP14731894

    申请日:1994-06-29

    Inventor: IEI FUON DAN

    Abstract: PURPOSE: To provide a memory interface for an ASIC or non-ASIC circuit for guaranteeing that data holding time is sufficient at all times for a data write operation and ensuring the optimization of performance by not making the data holding time so long. CONSTITUTION: The memory interface 120 on a semiconductor integrated circuit 100 is used for writing data to an external memory 110 by the clocking of write strobe signals and requests that the data are effectively held for little time after the write strobe signals are non-stated. The memory interface 200 allows and inhibits the use of the semiconductor IC by transferring the data to a data bus 140 connected to the external memory 110 by the statement and non-statement of the write strobe signals. The data are stably kept on the data bus 140 while the write strobe signals are stated and allowed to be unstable only after the write strobe signals are non-stated.

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