SCANNING PROGRAMMABLE CHECK MATRIX FOR SYSTEM INTERCONNECTION USE

    公开(公告)号:JPH07154451A

    公开(公告)日:1995-06-16

    申请号:JP15344594

    申请日:1994-07-05

    Abstract: PURPOSE: To make it possible to reconstitute a system by checking whether a data field generated in specific communication is to be allowed by a communication protocol or inhibited. CONSTITUTION: Respective M and N fields generated from a bus are latched by M and N latches 32, 34 at proper time and respectively sent to a row MUX 35 and a column MUX 36 and unique row and column corresponding to respective fields are selected. A selected output is sent to one input of an output AND gate 38 and a timing window signal (optional) is sent to the other input to generate a clocked error signal. Thus an error check signal for instructing whether a pair of 1st and 2nd data fields are to be allowed by a communication protocol or not is selected, and when the prescribed pair is not allowed by the communication protocol, the selected error check signal stops the specific communication operation.

Patent Agency Ranking