公开(公告)号：CA2211123A1

公开(公告)日：1996-08-01

申请号：CA2211123

申请日：1996-01-16

Applicant: TANDEM COMPUTERS INC

Inventor： MURTHY SRINIVASA D ,  MODIRI RAMIN ,  ROWE ALAN L

IPC: G06F11/20 ,  G06F9/46 ,  G06F9/52 ,  G06F11/00 ,  G06F11/14

Abstract: An apparatus and method, using an inter-processor lock to coordinate signal delivery to a process group whose member processes are distributed across multiple processors. The apparatus and method insure that each process group member process receives the same signals in the same order and that no signal is duplicated. The apparatus and method also insure that a partially completed signal delivery is completed even in the face of failure of the signalling processor.

公开(公告)号：EP0806006A4

公开(公告)日：1998-04-29

申请号：EP96902677

申请日：1996-01-16

Applicant: TANDEM COMPUTERS INC

Inventor： MODIRI RAMIN ,  MURTHY SRINIVASA D ,  ROWE ALAN L

IPC: G06F11/20 ,  G06F9/46 ,  G06F9/52 ,  G06F11/00 ,  G06F11/14

CPC classification number: G06F11/2023 ,  G06F9/542 ,  G06F11/1443

Abstract: An apparatus and method, using an inter-processor lock to coordinate signal delivery to a process group (G1) whose member processes (P100, P110, P120) are distributed across multiple processors (2a, 2b, 2c). The apparatus and method insure that each process group memory process receives the same signals in the same order and that no signal is duplicated. The apparatus and method also insure that a partially completed signal delivery is completed even in the face of failure of the signalling processor.