公开(公告)号：JPH0375834A

公开(公告)日：1991-03-29

申请号：JP13242490

申请日：1990-05-22

Applicant: TANDEM COMPUTERS INC

Inventor： REIMONDO SUKOTSUTO CHIYAN

IPC: G06F11/10

Abstract: PURPOSE: To improve the efficiency of a time critical path by removing a parity detector and a parity generator from the time critical path between an RAM data register and a computing element and setting those devices in parallel to the data path of the computing element. CONSTITUTION: A parity detector 100 and a parity generator 102 are set separately from a data path 112 connecting an RAM data register 106 with a computing element 110, and direct connection through the data path 112 can be attained. The parity detector 100 detects data in parallel to the computing element 110 by using the parallel data path, and therefore the delay of the processing of a data word 116 due to the computing element 110 is prevented. Thus, the speed and efficiency of sequential parity correction in the time critical path between the processors which use correctable memory sources and data is improved.