Parallel, distributed, sample-decryption circuit for a physical layer with cell-based asynchronous transfer mode

    公开(公告)号:FR2702907A1

    公开(公告)日:1994-09-23

    申请号:FR9403202

    申请日:1994-03-18

    Abstract: The invention relates to a parallel, distributed, sample-decrypter for a cell-based ATM physical layer, including a PRBS generator (22) intended to generate an 8-bit random number in order to execute a generator polynomial given by x + X + 1, a decrypter (21) intended to add 8 reception data bits to the 8 bits of the random number and deliver the decrypted data bits, and a sample processor (23) intended to extract, as first and second samples, 2 bits of the 8-bit random number in response to external synchronous clock and sampling clock signals, to extract, as PRBS samples from a sender, first and second highest-order bits of a syndrome signal originating from a cell delineation part in response to the two clock signals, to compare the first and second samples and the first and second highest-order bits with each other, and to deliver first and second synchronous signals depending on the result of the comparison.

Patent Agency Ranking