公开(公告)号：AU2003262407A1

公开(公告)日：2003-11-03

申请号：AU2003262407

申请日：2003-01-17

Applicant: TOKYO ELECTRON LTD

Inventor： HAGIWARA MASAAKI ,  NISHIMURA EIICHI ,  INAZAWA KOUICHIRO ,  HATAMURA YASUNORI ,  BALASUBRAMANIAM VAIDYANATHAN

IPC: H01L21/3065 ,  H01L21/00 ,  H01L21/302 ,  H01L21/304 ,  H01L21/31 ,  H01L21/461

Abstract: A method is provided for plasma ashing to remove photoresist remnants and etch residues that are formed during preceding plasma etching of dielectric layers. The ashing method uses a two-step plasma process involving an hydrogen-containing gas, where low or zero bias is applied to the substrate in the first cleaning step to remove significant amount of photoresist remnants and etch residues from the substrate, in addition to etching and removing detrimental fluoro-carbon residues from the chamber surfaces. An increased bias is applied to the substrate in the second cleaning step to remove the remains of the photoresist and etch residues from the substrate. The two-step process reduces the memory effect commonly observed in conventional one-step ashing processes. A method of endpoint detection can be used to monitor the ashing process.

公开(公告)号：AU2003262408A1

公开(公告)日：2003-11-03

申请号：AU2003262408

申请日：2003-01-17

Applicant: TOKYO ELECTRON LTD

Inventor： HAGIWARA MASAAKI ,  NISHIMURA EIICHI ,  INAZAWA KOUICHIRO ,  BALASUBRAMANIAM VAIDYANATHAN

IPC: H01L21/3065 ,  B31D3/00 ,  G03F7/42 ,  H01L21/02 ,  H01L21/027 ,  H01L21/304 ,  H01L21/311

Abstract: A method is provided for plasma ashing to remove photoresist remnants and etch residues that are formed during preceding plasma etching of dielectric layers. The ashing method uses a two-step plasma process involving an oxygen-containing gas, where low or zero bias is applied to the substrate in the first cleaning step to remove significant amount of photoresist remnants and etch residues from the substrate, in addition to etching and removing detrimental fluoro-carbon residues from the chamber surfaces. An increased bias is applied to the substrate in the second cleaning step to remove the remains of the photoresist and etch residues from the substrate. The two-step process reduces the memory effect commonly observed in conventional one-step ashing processes. A method of endpoint detection can be used to monitor the ashing process.

公开(公告)号：EP1120822A4

公开(公告)日：2004-11-10

申请号：EP99940607

申请日：1999-09-01

Applicant: TOKYO ELECTRON LTD

Inventor： AKAHORI TAKASHI ,  INAZAWA KOUICHIRO ,  SENOO KOUJI ,  HAGIWARA MASAAKI

IPC: H01L21/302 ,  H01L21/3065 ,  H01L21/31 ,  H01L21/311 ,  H01L21/312 ,  H01L21/314 ,  H01L21/316 ,  H01L21/3205 ,  H01L21/768

CPC classification number: H01L21/76832 ,  H01L21/0212 ,  H01L21/02274 ,  H01L21/31116 ,  H01L21/3127 ,  H01L21/31612 ,  H01L21/76807 ,  H01L21/76808 ,  H01L21/76835 ,  H01L2221/1031 ,  H01L2221/1036

Abstract: A semiconductor device using, e.g., a fluorine containing carbon film, as an interlayer dielectric film is produced by a dual damascene method which is a simple technique. After an dielectric film, e.g., an SiO2 film 3, is deposited on a substrate 2, the SiO2 film 3 is etched to form a via hole 31 therein, and then, a top dielectric film, e.g., a CF film 4, is deposited on the top face of the SiO2 film 3. If the CF film is deposited by activating a thin-film deposition material having a bad embedded material, e.g., C6F6 gas, as a plasma, the CF film 4 can be deposited on the top face of the SiO2 film 3 while inhibiting the CF film from being embedded into the via hole 31. Subsequently, by etching the CF film 4 to form a groove 41 therein, it is possible to easily produce a dual damascene shape wherein the groove 41 is integrated with the via hole 31.

公开(公告)号：JP2001068454A

公开(公告)日：2001-03-16

申请号：JP24142799

申请日：1999-08-27

Applicant: TOKYO ELECTRON LTD

Inventor： HAGIWARA MASAAKI ,  INASAWA KOICHIRO ,  NAITO WAKAKO

IPC: H01L21/302 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/768 ,  H05H1/46

Abstract: PROBLEM TO BE SOLVED: To provide a method of etching an SiNx layer hard to oxidate a Cu layer. SOLUTION: A process gas contg. a gas composed of C, H and F, O2 and Ar is introduced into a process chamber 102 of a plasma treating apparatus 100, the process gas flow rate ratio is set to e.g. CH2F2/O2/Ar=20 sccm/10 sccm/100 sccm, the pressure in the process chamber 102 is set to about 50 mTorr, a high frequency power of 500 W at 13.56 MHz is applied to a lower electrode 108 on which a wafer W is laid, the process gas is turned to a plasma, an SiNx layer 206 formed on a Cu layer 204 is etched and the exposed Cu layer 204 is hardly oxidated and not implanted with C or F.

公开(公告)号：JP2000036484A

公开(公告)日：2000-02-02

申请号：JP17065798

申请日：1998-06-02

Applicant: TOKYO ELECTRON LTD

Inventor： SHIMIZU RYUKICHI ,  KAMIDOI SUSUMU ,  HAGIWARA MASAAKI ,  INASAWA KOICHIRO

IPC: H01L21/302 ,  H01L21/3065

Abstract: PROBLEM TO BE SOLVED: To execute the etching work of a prescribed shape to an organic low dielectric constant material film layer. SOLUTION: A wafer W is mounted on a lower electrode 106, arranged inside the processing chamber 102 of an etching device 10 and the temperature of the wafer W is maintained at -30 deg.C to 30 deg.C. Processing gas consisting of a gaseous mixture of N2, H2 and Ar, whose flow rate ratio (Ar/(N2+H2+Ar)) is 0.7-0.8, is introduced to the inside the processing chamber 102, and a pressure atmosphere inside the processing chamber 102 is set to 5 mTorr-15 mTorr. A high frequency power of 1,000 W-2,500 W at 13.56 MHz and a high frequency power of 500 W-1,000 W at 13.56 MHz are respectively impressed to a coil 154 and the lower electrode 106. By a plasma generated inside the processing chamber 102, the contact hole of the prescribed shape is formed in an interlayer insulation film layer, consisting of the organic low dielectric constant material of the wafer W.

公开(公告)号：JP2001060582A

公开(公告)日：2001-03-06

申请号：JP23519199

申请日：1999-08-23

Applicant: TOKYO ELECTRON LTD

Inventor： KOBAYASHI KEN ,  HAGIWARA MASAAKI ,  NAITO WAKAKO ,  INASAWA KOICHIRO

IPC: H01L21/302 ,  C23F4/00 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/312 ,  H01L21/768

Abstract: PROBLEM TO BE SOLVED: To provide an etching method which can prevent micro trenching, without using etching stoppers. SOLUTION: This etching method for etching an org. film layer, formed on a wafer in a hermetic processing chamber with a process gas fed into the process chamber, uses a processing gas contg. N2 and H2, and the pressure in the vacuum processing chamber is substantially 500-800 mTorr. If the processing gas contains at least N atom-contg. gas and a H atom-contg. gas and the pressure in the vacuum processing chamber is set to substantially 500 mTorr or higher, then micro trenching can be prevented, without using etching stoppers and the mask select ratio can be raised.

公开(公告)号：JPH11233492A

公开(公告)日：1999-08-27

申请号：JP4116498

申请日：1998-02-06

Applicant: TOKYO ELECTRON LTD ,  HITACHI LTD

Inventor： GODAIIN HIRONORI ,  HAGIWARA MASAAKI ,  YUNOGAMI TAKASHI

IPC: H01L21/302 ,  H01L21/203 ,  H01L21/205 ,  H01L21/3065

Abstract: PROBLEM TO BE SOLVED: To provide a detection window of the plasma light of a plasma processor where the transmission quantity of an emission spectrum does not change even if adhered objects are adhered to the surface of the detection window. SOLUTION: A detection window 122 fitted to the prescribed position of a side wall of a processing room 102 in an etching device 100 is constituted of a first member 126 and a second member 128. The first member 126 is constituted of aluminum whose surface is anodized or lead glass whose surface is hydrogen reduction/reaction-processed and a plurality of micro through holes 126a are formed. The second member is constituted of quartz. The first member 126 is engaged to the detection window fitting port of the side wall of the processing room 102 from outside the processing room 102. Then, the second member 128 is engaged and the detection window 122 is fastened to the side wall of the processing room 102 with fitting screws. Only an emission spectrum entering into the micro through holes 126a is transmitted to the light reception part of an end detector 124 through the second member 128.

公开(公告)号：JP2011066441A

公开(公告)日：2011-03-31

申请号：JP2010261500

申请日：2010-11-24

Applicant: Tokyo Electron Ltd ,  東京エレクトロン株式会社

Inventor： BALASUBRAMANIAM VAIDYANATHAN ,  HAGIWARA MASAAKI ,  NISHIMURA EIICHI ,  INAZAWA KOUICHIRO

IPC: H01L21/3065 ,  B31D3/00 ,  G03F7/42 ,  H01L21/02 ,  H01L21/027 ,  H01L21/304 ,  H01L21/311

CPC classification number: H01L21/02063 ,  G03F7/427 ,  H01L21/31138

Abstract: PROBLEM TO BE SOLVED: To provide a plasma processing method for removing photoresist and etching residue, where erosion of the surrounding substrate layer is reduced as compared with that in one-step ashing.
SOLUTION: An ashing method uses a two-step plasma process involving a hydrogen-containing gas, where a low bias or zero bias is applied to a substrate in a first cleaning step to remove a significant amount of photoresist remnant and etching residue from the substrate, and removing a detrimental fluorocarbon residue is removed from a chamber surface by etching. An increased bias is applied to the substrate in a second cleaning step to remove the photoresist remnant and etching residue from the substrate. The two-step process reduces the memory effect commonly observed in each conventional one-step ashing process. A method of endpoint detection can be used to monitor the ashing process.
COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题：提供一种等离子体处理方法，用于去除光刻胶和蚀刻残留物，与一步灰化相比，周围基底层的侵蚀减小。 解决方案：灰化方法使用涉及含氢气体的两步等离子体工艺，其中在第一清洁步骤中向衬底施加低偏压或零偏压以除去大量光致抗蚀剂残留物和蚀刻残留物 通过蚀刻从室内表面除去有害的碳氟化合物残渣。 在第二清洗步骤中，对衬底施加增加的偏压以除去光致抗蚀剂残余物并从衬底上蚀刻残留物。 两步法减少了常规一步灰化过程中常见的记忆效应。 端点检测方法可用于监测灰化过程。 版权所有（C）2011，JPO＆INPIT

公开(公告)号：JP2001127040A

公开(公告)日：2001-05-11

申请号：JP30342299

申请日：1999-10-26

Applicant: TOKYO ELECTRON LTD

Inventor： ISHIKAWA MITSURU ,  HAGIWARA MASAAKI ,  INASAWA KOICHIRO

IPC: H01L21/302 ,  C23F4/00 ,  H01L21/3065

Abstract: PROBLEM TO BE SOLVED: To provide an etching method which can enhance the selectivity ratio and improvement of etching form. SOLUTION: In an etching method for a film being the target of etching made on a substrate arranged within a processing chamber, the processing gas introduced into an air-tight processing chamber 104 consists of CF4, N2, and Ar, and the film being the target of etching consists of an upper organic polysiloxane film and a lower organic SiO2 film. The flow ratio of CF4 to N2 in the processing gas is substantially 1

公开(公告)号：JP2000150516A

公开(公告)日：2000-05-30

申请号：JP32153798

申请日：1998-10-27

Applicant: TOKYO ELECTRON LTD

Inventor： AKAHORI TAKASHI ,  INASAWA KOICHIRO ,  SENOO KOJI ,  HAGIWARA MASAAKI

IPC: H01L21/302 ,  H01L21/3065 ,  H01L21/31 ,  H01L21/311 ,  H01L21/312 ,  H01L21/314 ,  H01L21/316 ,  H01L21/3205 ,  H01L21/768

Abstract: PROBLEM TO BE SOLVED: To fabricate a semiconductor device employing a fluorine added carbon film as an interlayer insulating film using a simple dual Damascene method. SOLUTION: An insulating film, e.g. SiO2 film 3 is deposited on a substrate 2 and a via hole 31 is etched therein and then an upper insulating film, e.g. a CF film 4, is formed on the upper surface of the SiO2 film 3. When the CF film is deposited by generating plasma of a filming material having bad embedding characteristics, e.g. C6F6 gas, the CF film can be deposited on the upper surface of the SiO2 film 3 while suppressing embedding of the CF film into the via hole 31. When a trench 41 is etched subsequently in the CF film 4, a dual Damascene shape integrating the trench 41 and the via hole 31 can be obtained easily.