COVERLAY FILM
    1.
    发明专利

    公开(公告)号:JP2002076583A

    公开(公告)日:2002-03-15

    申请号:JP2000265007

    申请日:2000-09-01

    Abstract: PROBLEM TO BE SOLVED: To industrially provide a novel coverlay film exhibiting excellent shelf life, adhesion and solder heat resistance without sacrifice of circuit embedding properties. SOLUTION: The coverlay film comprises a laminate of an insulating plastic film layer coated with a thermosetting adhesive layer and a mold releasing film layer wherein the adhesive layer in semicured state satisfies following conditions: (C) heating value in 160 deg.C 60 min constant temperature holding process is 5-22 J/g according to DSC(differential scanning calorimetry), (B) vertex of heating curve is 200 deg.C or above in DSC, and (C) copper foil adhesion is 5 N/cm or above after hot press curing.

    METHOD OF MANUFACTURING SUBSTRATE FOR SEMICONDUCTOR CIRCUIT, AND SEMICONDUCTOR DEVICE

    公开(公告)号:JP2003229458A

    公开(公告)日:2003-08-15

    申请号:JP2002025328

    申请日:2002-02-01

    Abstract: PROBLEM TO BE SOLVED: To provide a substrate for a semiconductor IC which is capable of retaining an original adhesion for a long time without leaving bubbles when constituent components of the substrate are pasted to each other. SOLUTION: The substrate for a semiconductor IC comprises (A) a wiring board formed of an insulator layer and a conductor pattern, at least one layer of (B) layer not formed with a conductor pattern, and at least one layer of (C) adhesive layer. A method of manufacturing the substrate for a semiconductor IC comprises applying an organic solvent to either a pasting face of (A) the wiring board or a pasting face of the adhesive layer, or both of the pasting faces, and applying the organic solvent to either a pasting face of the (B) layer or another pasting face of the adhesive layer, or both of the pasting faces, and then compressing-bonding the wiring board and these layers, and heating the laminate to volatilize and remove the organic solvent. COPYRIGHT: (C)2003,JPO

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