公开(公告)号：JPH08330272A

公开(公告)日：1996-12-13

申请号：JP1608496

申请日：1996-01-31

Applicant: TOSHIBA CORP ,  IBM

Inventor： NAKAYAMA NORIO ,  DOJIRO MASAYUKI ,  HIRAYAMA HIDEO ,  TSUJIMURA TAKATOSHI ,  MAKITA ATSUYA

IPC: G02F1/136 ,  G02F1/1368 ,  H01L21/306 ,  H01L21/336 ,  H01L29/786

Abstract: PROBLEM TO BE SOLVED: To provide a method for manufacturing thin-film transistors which ensure etching for a substance having a metallic film and an oxide film. SOLUTION: In an etching step of a second gate insulated film 4 and a first gate insulated film 3, a glass substrate 1 having a gate electrode 2 of Al, of which a surface is coated with a first insulation film 3 of Al2 O3 is placed in an etching solution containing a hydrofluoric acid together with a counter electrode, and Al of the gate electrode 2 is set in an inactive potential, so that a surface of Al of the gate electrode 2 is held in an unetching state. A potential of a surface of Al2 O3 of the first gate insulated film 3 on Al of the gate electrode 2 is determined according to a potential of a counter electrode as Al2 O3 is an insulation film of high resistance, and the potential of the counter electrode is set at a nobler potential than Al and in a region where Al is ionized, and the potential of the surface of Al2 O3 is also set at a potential that Al is active. Only Al2 O3 of the first gate insulation film 3 on Al of the gate electrode 2 is removed.

公开(公告)号：JP2002244586A

公开(公告)日：2002-08-30

申请号：JP2001029587

申请日：2001-02-06

Applicant: IBM

Inventor： TSUJIMURA TAKATOSHI ,  MAKITA ATSUYA ,  ARAI TOSHIAKI

IPC: G02F1/1333 ,  G02F1/1345 ,  G09F9/00 ,  G09F9/30 ,  H01L21/3205 ,  H01L23/52 ,  H01L27/12 ,  H01L51/50 ,  H05B33/14 ,  H05B33/26

Abstract: PROBLEM TO BE SOLVED: To provide an array substrate for display, the manufacturing method of the array substrate for display and a display device in which the array substrate for display is used. SOLUTION: This substrate is an array substrate for display in which a thin film transistor array which is formed on an insulating substrate 1, plural wirings 23, 24 which are arranged on the insulating substrate 1, connection pads 25, 27 which are arranged at one ends of the wirings 23, 24 and are connected respectively to these wirings 23, 24 and pixel electrodes 22 are included and, moreover, in the substrate, dummy conductive patterns 29 are arranged among end parts of the connection pads 25, 27 and end parts of the pixel electrodes 22.