CIRCUIT FOR AVOIDING CROSSTALK AND EDDY CURRENT IN INTEGRATED CIRCUIT

    公开(公告)号:JP2003249555A

    公开(公告)日:2003-09-05

    申请号:JP2002041178

    申请日:2002-02-19

    Inventor: CHIN SEIYU KA SOGI

    Abstract: PROBLEM TO BE SOLVED: To provide a bar circuit which reduces crosstalks and eddy currents in an integrated circuit. SOLUTION: The bar circuit comprises a first conductivity semiconductor substrate, a second conductivity first elongate well in the semiconductor substrate, and a second conductivity second elongated well in the semiconductor substrate. The second elongated well is under the first elongate well and adjacent to under the first elongated well, thereby connecting it with a barrier to cut off the crosstalks and eddy currents. COPYRIGHT: (C)2003,JPO

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