公开(公告)号：JP2000216373A

公开(公告)日：2000-08-04

申请号：JP1231199

申请日：1999-01-20

Applicant: UNITED MICROELECTRONICS CORP

Inventor： RIN KENTEI ,  CHIN SHINRAI ,  SHU SHIBUN

IPC: H01L21/28 ,  H01L21/336 ,  H01L29/78

Abstract: PROBLEM TO BE SOLVED: To prevent generation of gate-drain capacitance by implanting ions into a substrate using a second spacer, offset spacer and a gate structure as a mask thereby forming a source/drain region. SOLUTION: An offset spacer 308 having a thickness 311 is formed on the sidewall of a gate structure and first ion implantation processing 312 for implanting ions into a substrate using the gate structure 302 and an offset spacer 308 as a mask is carried out to obtain an LDD(low doping drain) region 314. Subsequently, a second spacer 316 is formed on the outer sidewall of the offset spacer 308 and second ion implantation processing 322 for implanting ions into the substrate 300 using the second spacer 316 and the gate structure 302 as a mask is carried out to form a source-drain region 318 in the LDD region 314.

公开(公告)号：JP2000196079A

公开(公告)日：2000-07-14

申请号：JP37425998

申请日：1998-12-28

Applicant: UNITED MICROELECTRONICS CORP

Inventor： CHIN SHINRAI ,  RIN KENTEI ,  SHU SHIBUN

IPC: H01L29/78 ,  H01L21/265 ,  H01L21/336 ,  H01L29/10

Abstract: PROBLEM TO BE SOLVED: To provide a manufacturing method of a modified MOS semiconductor suitable for a high level integrated element. SOLUTION: This manufacturing method of a MOS semiconductor includes forming a gate 306 on a substrate 300. The extended source/drain 310a are made on a substrate in the vicinity of the gate. Ion implantation process for implanting heavily impurities which are low in diffusion coefficient within a substrate is carried out. A halogen region which is heavily doped is made under the extended source/drain 310a on the substrate 300. An oblique halogen implantation process is carried out to form a halogen implantation region under the gate, on the side of the extension source/drain region 310a on the substrate 300.

公开(公告)号：JP2000216374A

公开(公告)日：2000-08-04

申请号：JP961699

申请日：1999-01-18

Applicant: UNITED MICROELECTRONICS CORP

Inventor： CHIN SHINRAI ,  YO BUNKAN ,  SHU SHIBUN

IPC: H01L29/78 ,  H01L21/336

Abstract: PROBLEM TO BE SOLVED: To provide a manufacturing method of a MOS transistor. SOLUTION: In this manufacture, a gate oxide layer 202, a polysilicon layer 204, a barrier layer 206, and a conductor layer 208 are made continuously on a substrate. A part of the conductor layer and a part of the barrier layer are removed until the polysilicon layer is exposed, by executing a photolithographic/ etching process. Next, ion implantation is conducted, using a remaining conductor layer 208a and a remaining barrier layer 206a as a mask, so as to form a lightly-doped region 212. A spacer 214 is made on the sidewall of the conductor layer and on the sidewall of the barrier layer. The remaining conductor layer, the polysilicon layer in a position other than the spacer, and the gate oxide layer are removed. The remaining conductor layer and the remaining polysilicon layer constitute a gate having a cross section in the shape of inverted T. A source/drain region which includes a low-doped region is made within the substrate by the ion implantation, using a gate structure as a mask.

公开(公告)号：JP2000208437A

公开(公告)日：2000-07-28

申请号：JP301499

申请日：1999-01-08

Applicant: UNITED MICROELECTRONICS CORP

Inventor： RIN KENTEI ,  SHU SHIBUN

IPC: H01L29/78 ,  H01L21/265 ,  H01L21/28 ,  H01L21/285 ,  H01L21/336

Abstract: PROBLEM TO BE SOLVED: To provide a method for forming a self-alignment silicide (salicide) layer. SOLUTION: A method for forming a silicide layer includes a pre-amorphous implanting step before a salicide process. In the pre-amorphous implanting step, impact is applied to a silicon surface of the substrate 200 using BF2+ ions, and an amorphous layer 22 is formed thereon. The salicide step includes a step for forming a metallic layer 210 on the substrate 200, a step for forming a salicide layer 212 on a silicon surface in a rapid thermal process(RTP), and a step for removing a metallic layer 210 that is not reactivated.