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公开(公告)号：US20140191298A1
公开(公告)日：2014-07-10
申请号：US13737949
申请日：2013-01-10
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Yi-Wei Chen , Chien-Chung Huang , Kok Seen Lew
CPC classification number: H01L29/66795 , H01L21/26506 , H01L21/28518 , H01L21/76831 , H01L21/76843 , H01L21/76855 , H01L23/485 , H01L29/0847 , H01L29/401 , H01L29/41766 , H01L29/41791 , H01L29/4232 , H01L29/45 , H01L29/456 , H01L29/665 , H01L29/66545 , H01L29/66553 , H01L29/6656 , H01L29/66628 , H01L29/66636 , H01L29/785 , H01L2924/0002 , H01L2924/00
Abstract: A semiconductor device includes a semiconductor substrate, a metal gate structure, at least an epitaxial layer, an interlayer dielectric, at least a contact hole, at least a metal silicide layer and a fluorine-containing layer. The semiconductor substrate has at least a gate region and at least a source/drain region adjoining the gate region. The gate structure is disposed on the semiconductor substrate within the gate region. The epitaxial layer is disposed on the semiconductor substrate within the source/drain region. The interlayer dielectric covers the semiconductor substrate, the gate structure and the epitaxial layer. The contact hole penetrates the interlayer dielectric to reach the epitaxial layer. The metal silicide layer is formed in the epitaxial layer and is located on the bottom of the contact hole. The fluorine-containing layer is disposed on or in the epitaxial layer and is around sides of the metal silicide layer.
Abstract translation: 半导体器件包括半导体衬底，金属栅极结构，至少外延层，层间电介质，至少接触孔，至少金属硅化物层和含氟层。 半导体衬底至少具有栅极区域和至少与栅极区域相邻的源极/漏极区域。 栅极结构设置在栅极区域内的半导体衬底上。 外延层设置在源极/漏极区域内的半导体衬底上。 层间电介质覆盖半导体衬底，栅极结构和外延层。 接触孔穿透层间电介质到达外延层。 金属硅化物层形成在外延层中并且位于接触孔的底部。 含氟层设置在外延层中或外延层中并且在金属硅化物层的侧面附近。
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公开(公告)号：US09076759B2
公开(公告)日：2015-07-07
申请号：US13737949
申请日：2013-01-10
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Yi-Wei Chen , Chien-Chung Huang , Kok Seen Lew
CPC classification number: H01L29/66795 , H01L21/26506 , H01L21/28518 , H01L21/76831 , H01L21/76843 , H01L21/76855 , H01L23/485 , H01L29/0847 , H01L29/401 , H01L29/41766 , H01L29/41791 , H01L29/4232 , H01L29/45 , H01L29/456 , H01L29/665 , H01L29/66545 , H01L29/66553 , H01L29/6656 , H01L29/66628 , H01L29/66636 , H01L29/785 , H01L2924/0002 , H01L2924/00
Abstract: A semiconductor device includes a semiconductor substrate, a metal gate structure, at least an epitaxial layer, an interlayer dielectric, at least a contact hole, at least a metal silicide layer and a fluorine-containing layer. The semiconductor substrate has at least a gate region and at least a source/drain region adjoining the gate region. The gate structure is disposed on the semiconductor substrate within the gate region. The epitaxial layer is disposed on the semiconductor substrate within the source/drain region. The interlayer dielectric covers the semiconductor substrate, the gate structure and the epitaxial layer. The contact hole penetrates the interlayer dielectric to reach the epitaxial layer. The metal silicide layer is formed in the epitaxial layer and is located on the bottom of the contact hole. The fluorine-containing layer is disposed on or in the epitaxial layer and is around sides of the metal silicide layer.
Abstract translation: 半导体器件包括半导体衬底，金属栅极结构，至少外延层，层间电介质，至少接触孔，至少金属硅化物层和含氟层。 半导体衬底至少具有栅极区域和至少与栅极区域相邻的源极/漏极区域。 栅极结构设置在栅极区域内的半导体衬底上。 外延层设置在源极/漏极区域内的半导体衬底上。 层间电介质覆盖半导体衬底，栅极结构和外延层。 接触孔穿透层间电介质到达外延层。 金属硅化物层形成在外延层中并且位于接触孔的底部。 含氟层设置在外延层中或外延层中并且在金属硅化物层的侧面附近。
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公开(公告)号：US09401417B2
公开(公告)日：2016-07-26
申请号：US14726595
申请日：2015-05-31
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Yi-Wei Chen , Chien-Chung Huang , Kok Seen Lew
IPC: H01L21/44 , H01L29/66 , H01L29/40 , H01L29/45 , H01L21/265 , H01L21/285 , H01L29/417 , H01L29/78 , H01L21/768 , H01L29/08 , H01L29/423 , H01L23/485
CPC classification number: H01L29/66795 , H01L21/26506 , H01L21/28518 , H01L21/76831 , H01L21/76843 , H01L21/76855 , H01L23/485 , H01L29/0847 , H01L29/401 , H01L29/41766 , H01L29/41791 , H01L29/4232 , H01L29/45 , H01L29/456 , H01L29/665 , H01L29/66545 , H01L29/66553 , H01L29/6656 , H01L29/66628 , H01L29/66636 , H01L29/785 , H01L2924/0002 , H01L2924/00
Abstract: A method of manufacturing a semiconductor device includes forming an epitaxial layer within a source/drain region of a semiconductor substrate, forming a fluorine-containing layer on the surface of the epitaxial layer, forming a metal gate structure within the gate region after the step of forming the fluorine-containing layer, forming an interlayer dielectric to cover the semiconductor substrate, the epitaxial layer and the metal gate structure, forming a contact hole penetrating the interlayer dielectric to expose a portion of the epitaxial layer, forming a metal silicide layer on or in the epitaxial layer on a bottom of the contact hole so that the fluorine-containing layer is disposed on the periphery of the metal silicide layer.
Abstract translation: 一种制造半导体器件的方法包括：在半导体衬底的源极/漏极区域内形成外延层，在外延层的表面上形成含氟层，在栅极区域之后形成金属栅极结构，步骤 形成含氟层，形成覆盖半导体衬底，外延层和金属栅极结构的层间电介质，形成穿透层间电介质的接触孔，以露出外延层的一部分，在其上形成金属硅化物层 在接触孔的底部的外延层中，使得含氟层设置在金属硅化物层的周围。
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公开(公告)号：US20150263137A1
公开(公告)日：2015-09-17
申请号：US14726595
申请日：2015-05-31
Applicant: United Microelectronics Corp.
Inventor： Yi-Wei Chen , Chien-Chung Huang , Kok Seen Lew
IPC: H01L29/66 , H01L21/265 , H01L21/285 , H01L21/768 , H01L29/45 , H01L29/417 , H01L29/08 , H01L29/423
CPC classification number: H01L29/66795 , H01L21/26506 , H01L21/28518 , H01L21/76831 , H01L21/76843 , H01L21/76855 , H01L23/485 , H01L29/0847 , H01L29/401 , H01L29/41766 , H01L29/41791 , H01L29/4232 , H01L29/45 , H01L29/456 , H01L29/665 , H01L29/66545 , H01L29/66553 , H01L29/6656 , H01L29/66628 , H01L29/66636 , H01L29/785 , H01L2924/0002 , H01L2924/00
Abstract: A method of manufacturing a semiconductor device includes forming an epitaxial layer within a source/drain region of a semiconductor substrate, forming a fluorine-containing layer on the surface of the epitaxial layer, forming a metal gate structure within the gate region after the step of forming the fluorine-containing layer, forming an interlayer dielectric to cover the semiconductor substrate, the epitaxial layer and the metal gate structure, forming a contact hole penetrating the interlayer dielectric to expose a portion of the epitaxial layer, forming a metal silicide layer on or in the epitaxial layer on a bottom of the contact hole so that the fluorine-containing layer is disposed on the periphery of the metal silicide layer.
Abstract translation: 一种制造半导体器件的方法包括：在半导体衬底的源极/漏极区域内形成外延层，在外延层的表面上形成含氟层，在栅极区域之后形成金属栅极结构，步骤 形成含氟层，形成覆盖半导体衬底，外延层和金属栅极结构的层间电介质，形成穿透层间电介质的接触孔，以露出外延层的一部分，在其上形成金属硅化物层 在接触孔的底部的外延层中，使得含氟层设置在金属硅化物层的周围。
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