Abstract:
A stress memorization process including the following step is provided. A gate is formed on a substrate. A low-k dielectric layer with a dielectric constant lower than 3 is formed to entirely cover the gate and the substrate. A stress layer is formed to entirely cover the low-k dielectric layer. The stress layer and the low-k dielectric layer are removed. Moreover, a semiconductor structure including a contact etch stop layer is provided. A gate is disposed on a substrate. A porous layer entirely covers the gate and the substrate. A contact etch stop layer entirely covers the porous layer, wherein the thickness of the porous layer is thinner than the thickness of the contact etch stop layer.
Abstract:
A method for forming a semiconductor structure is provided, including the following steps. A first dielectric layer is formed on a substrate. An etching step is performed to the first dielectric layer. A N2O treating step is performed to an etched surface of the first dielectric layer. A second dielectric layer is formed on a N2O treated surface of the first dielectric layer.