High impedance semiconductor diode structure

    公开(公告)号:GB2466643A

    公开(公告)日:2010-07-07

    申请号:GB0823651

    申请日:2008-12-30

    Inventor: PENNOCK JOHN

    Abstract: The device comprises a continuous semiconductor structure having a plurality of regions of a first semiconductor type (n type or p type) material arranged alternately with at least one region of the opposite type on an insulating layer. The structure may be formed from polysilicon and may also include a plurality of intrinsic regions arranged between the n and p type regions. The structure forms a multi-junction composite diode and provides a high impedance for biasing capacitive plates of a MEMS device and/or biasing signal amplifiers for MEMS sensor devices.

    Digital-to-analogue converter
    2.
    发明专利

    公开(公告)号:GB2430819A

    公开(公告)日:2007-04-04

    申请号:GB0624160

    申请日:2003-12-05

    Abstract: A DAC circuit 500 comprises positive and negative signal processing devices 500a,b each with a feedback capacitor 104a,b and each having a second capacitor 106a,b switchably couplable to a reference source for charging and switchably couplable to dump charge to a said feedback capacitor 104a,b of the positive or negative signal processing device 500a,b. A method of operating the differential digital-to-analogue (DAC) circuit to reduce signal dependent loading of a reference source associated with the DAC circuit, comprises repeatedly coupling said second capacitors to said reference source for charging and coupling said second capacitors to alternate ones of said positive and negative devices for dumping stored charge to a respective feedback capacitor; such that on average over a plurality of charge-dump cycles charge loading of said reference source by said DAC circuit is substantially constant.

    Power Management Circuit
    3.
    发明专利

    公开(公告)号:GB2440356A

    公开(公告)日:2008-01-30

    申请号:GB0614710

    申请日:2006-07-25

    Abstract: Multiple power regulators 51, 52, and 53 are controlled according to the voltage on inputs VR1, VR2 and VR3 from a voltage network such as the potential divider resistors shown. A sequencer 56 has a control input SQCLK and outputs SQA, SQB, SQC that can modify the voltage on regulator inputs VR1, VR2, VR3. When this input voltage is within a certain range, which may be detected by comparator 55, the respective regulator is disabled. The invention provides a self-contained power management device, such as either a power management integrated circuit (IC) or an IC that includes selective power management functions, which allows sequenced start up of power supplies without an external sequencer and that has a configurable arrangement. The device may be configured to respond to either high or low signals (fig 6) or to a high impedance state on the voltage input, and to selectively or sequentially switch the regulators with a delay between each. The device may be used in a portable device such as an MP3 player, computer or wireless transceiver, a disc drive, a flash memory module, or a codec.

    Semiconductor structures for biasing devices

    公开(公告)号:GB2466643B

    公开(公告)日:2011-05-04

    申请号:GB0823651

    申请日:2008-12-30

    Inventor: PENNOCK JOHN

    Abstract: Semiconductor structures with high impedances for use in biasing for applying voltage bias to part of a device. The semiconductor structure comprises a continuous structure having a plurality of regions of a first semiconductor type (n type or p type) material arranged alternately with at least one region of the opposite type. The structure may be formed from polysilicon and may also include a plurality of intrinsic regions arranged between the n and p type regions. The structure forms a composite diode and provides a high impedance.

    Improved phase/frequency detector and phase lock loop circuit

    公开(公告)号:GB2400760B

    公开(公告)日:2005-12-21

    申请号:GB0308611

    申请日:2003-04-14

    Abstract: The present invention relates to cycle slip detectors for phase and frequency detectors (PFD) and to lock detectors for phase lock loop (PLL) circuits. The present invention provides a cycle slip detector circuit for use with a phase and frequency detector circuit having first and second signal inputs, and arranged to provide first and second PLL control signal outputs responsive to clock edges in the first and second input signals respectively; the cycle slip detector circuit comprising: means for determining a cycle slip between said input signals by determining when a delayed output signal coincides with a respective input signal.

    Level shifting charge pump power supply

    公开(公告)号:GB2447426A

    公开(公告)日:2008-09-17

    申请号:GB0625957

    申请日:2006-12-22

    Abstract: A charge pump circuit uses a single flying capacitor to supply dual-rail positive and negative output voltages from a single input voltage. The circuit comprises a controller 420 that opens and closes a network of switches S1-S6 in sequence, connecting an input voltage VDD, either directly or via a flying capacitor Cfb, to transfer packets of charge to reservoir capacitors CR1,CR2, to generate bipolar output voltages Vout+,Vout- which together span a voltage equal to the input voltage +VDD, and are centred on a common terminal N11. The sequence of switching may include overlapping states, interleaving states, repeating states, and states whereby the flying capacitor voltage is divided between the two output voltages. The sequence of switch states can be varied depending on load conditions, and the output voltages can be regulated depending on comparison with thresholds (fig 9). The charge pump may be used to supply audio (fig 11a), stereo (fig 11b), headphone, communication or in-car apparatus.

    Charge pump circuit having protection leakage elements

    公开(公告)号:GB2466775A

    公开(公告)日:2010-07-07

    申请号:GB0823653

    申请日:2008-12-30

    Abstract: This invention relates to charge pump circuits having circuit components SS1-4 - LS1-4 such as transistors which may be damaged by voltage transients greater than the normal operating voltage levels of the charge pump circuit, such as may be experienced during powering down. The circuit components to be protected are connected in parallel with a leakage element D1-4 arranged to have a leakage current that is small enough during normal operation to allow the charge pump to operate effectively but which is large enough, during development of a voltage transient, to prevent excess voltage levels being achieved. The leakage element may have a significant leakage current at a voltage less than the breakdown voltage of the circuit component. The leakage elements may be poly diodes 20.

    Variable power supplies for efficient amplification, using charge pumps

    公开(公告)号:GB2446843A

    公开(公告)日:2008-08-27

    申请号:GB0625955

    申请日:2006-12-22

    Abstract: The power supply 80 for an audio amplifier output stage 40 provides voltages which vary in dependence on a volume control signal S2 which controls the gain of amplifier stage 20. The power supply comprises a flying capacitor charge pump circuit (figures 5b, 16b) which provides opposite polarity supplies from a single polarity input. The charge pump may be fed through a controllable DC-DC buck converter (1010, figure 26), which can be bypassed when the battery voltage is low. The supply voltages may be regulated (figure 15). The charge pump may have dual modes (figures 10,16b) wherein it can be controlled to provide outputs which are either equal to the input voltage or a fraction of the input voltage. The variable power supply technique may be applied to line drivers for data transmission (figure 31).

    An audio amplifier operable to drive either headphones or a line output

    公开(公告)号:GB2444988A

    公开(公告)日:2008-06-25

    申请号:GB0625799

    申请日:2006-12-22

    Abstract: An audio amplifier uses the same circuit to drive either low impedance loads such as headphones with 32 Ohms impedance (fig. 1a) or high impedance loads such as the input impedance of an external amplifier with 10 KOhms impedance (figs. 1b or 1c). A dual mode charge pump 10 provides lower supply voltages when the loads have low impedance. Separate amplifiers for high and low impedance loads are thus not required. The mode of operation is determined by control circuit 24. The user may select the mode by use of a switch or menu option, or by setting the volume control to full scale to select a line output. Alternatively, the load impedance or output current may be sensed, or a headphone jack socket may be distinguished from a docking station. A signal indicating docking may also control the mode. The amplifier may be disabled when a headphone is attached and volume is set to full scale. Alternatively, the amplifier output impedance may be increased in high impedance mode.

    Charge pump circuit with dual rail output

    公开(公告)号:GB2444984A

    公开(公告)日:2008-06-25

    申请号:GB0625954

    申请日:2006-12-22

    Abstract: Disclosed is a dual mode charge-pump circuit for providing a plurality of output voltages Vout+, Vout-, using a single flying capacitor Cf. The circuit comprises a network of switches 410 that is operable in a number of different states and a controller 420 for operating the switches 410 in a sequence of states so as to generate positive and negative output voltages together spanning a voltage approximately equal to the input voltage +Vdd and centred on the voltage at the common terminal. The circuit may also be operated so as to generate positive and negative output voltages each up to substantially the input voltage.

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