公开(公告)号：EP1798519A4

公开(公告)日：2012-06-06

申请号：EP05790652

申请日：2005-10-07

Applicant: YAMAHA CORP

Inventor： YASUI SHOJI ,  OMURA MASAYOSHI ,  KANEKO MAKOTO ,  SATO HIDEKI

IPC: G01C17/38 ,  G01K7/01 ,  G01R33/02 ,  G01R35/00

CPC classification number: G01K7/01 ,  G01C17/38

公开(公告)号：JP2010226649A

公开(公告)日：2010-10-07

申请号：JP2009074137

申请日：2009-03-25

Applicant: Yamaha Corp ,  ヤマハ株式会社

Inventor： TODA AKIHIKO ,  YASUI SHOJI

IPC: H03F3/04 ,  H01L21/822 ,  H01L27/04 ,  H03G3/12

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit which can be surely operated even when a power supply voltage is low.
SOLUTION: The invention relates to a semiconductor integrated circuit including: NMOS switches 5, 6 for performing ON/OFF control, in accordance with control signals SEL1, SEL2, on signals inputted to input terminals 1, 2; and an operational amplifier 8 for amplifying the signals on which ON/OFF control has been performed by the NMOS switches 5, 6. The integrated circuit includes a level shifter 31 for boosting the control signals SEL1, SEL2 to a voltage higher than a power supply voltage of the operational amplifier 8.
COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题：提供一种半导体集成电路，即使在电源电压低的情况下也能够可靠地运行。 解决方案：本发明涉及一种半导体集成电路，包括：根据控制信号SEL1，SEL2对输入到输入端子1,2的信号执行ON / OFF控制的NMOS开关5,6; 以及用于放大由NMOS开关5,6进行了开/关控制的信号的运算放大器8.集成电路包括电平移位器31，用于将控制信号SEL1，SEL2升压到高于电源 运算放大器的电压8.版权所有（C）2011，JPO＆INPIT

公开(公告)号：JP2001292065A

公开(公告)日：2001-10-19

申请号：JP2000311169

申请日：2000-10-11

Applicant: YAMAHA CORP

Inventor： NORO MASAO ,  TAKAHASHI KUNIHITO ,  YASUI SHOJI

IPC: H03M1/66 ,  H03M1/68 ,  H03M1/76 ,  H03M1/78 ,  H03M1/80

Abstract: PROBLEM TO BE SOLVED: To provide a digital/analog converter with high accuracy that is capable of multi-bits processing and configured with CMOS transistors(TRs). SOLUTION: A switch matrix circuit 1 consists of a resistor string 5 comprising resistors in series connection, switches S0a-S8a, S0b-S8b, amplifiers 16, 17 and resistors 6, 7 connected like a matrix state. Each switch is on/off- controlled by a signal resulting from decoding high-order 4-bits of data to be converted and a voltage corresponding to the high-order 4-bits of the data to be converted is obtained as an output of the amplifiers 16, 17 thereby. A low-order bit conversion circuit 2 is a circuit conducting digital/analog conversion adopting conventional resistance weighting and converts low-order 4-bits of the data to be converted into an analog voltage. An operational amplifier 3 synthesizes the outputs of the circuits 1, 2 to obtain an analog conversion output.

公开(公告)号：JP2001127626A

公开(公告)日：2001-05-11

申请号：JP30460999

申请日：1999-10-26

Applicant: YAMAHA CORP

Inventor： TOMIMATSU KIYOYUKI ,  TSUCHIDO TOSHIAKI ,  YASUI SHOJI ,  SHIRAYANAGI TORU ,  ISHIJIMA KIYOSHI

IPC: H03L7/10 ,  H03L7/08 ,  H03L7/183 ,  H04L7/033

Abstract: PROBLEM TO BE SOLVED: To provide a PLL circuit that can easily shift to a lock state and cope with a sampling frequency over a range wider than a conventional range without extending a clock frequency width more than a conventional lock frequency width. SOLUTION: A higher lock frequency is set in advance when no data stream DF is applied to an input terminal 11, and the lock frequency is shifted to a lower frequency when the data stream DF is applied to the input terminal 11. Thus, locking is easily shifted at the application of the data stream DF. Furthermore, a range counter 38 detects the frequency of the data stream DF, selects any of frequency divider circuits 34-36 and uses the selected frequency divider circuit according to the result of detection. Thus, the PLL circuit can cope with a sampling frequency with a range wider than that of a conventional PLL circuit without extending a variable frequency width of an output of a VCO 21 more than that of the conventional PLL circuit.

公开(公告)号：JP2008136127A

公开(公告)日：2008-06-12

申请号：JP2006322211

申请日：2006-11-29

Applicant: Yamaha Corp ,  ヤマハ株式会社

Inventor： YASUI SHOJI ,  TSUCHIYA HIROTOSHI ,  SHIMIZU YOSHIKO ,  TODA AKIHIKO ,  MAEJIMA TOSHIO

IPC: H03F3/34 ,  H03F3/45

Abstract: PROBLEM TO BE SOLVED: To suppress offset even when the relevant offset occurs in the signal level of an input signal. SOLUTION: An offset cancel apparatus S1 is configured to complementarily change a resistance value between the inverted input terminal and the signal input terminal IN of an operational amplifier 20A for differential amplification circuit and a resistance value between the inverted input terminal and an output terminal, to gradually reduce the potential of an output signal Vout and to specify each resistance value in such a way that the potential becomes "0" finally, and carries out offset cancel using the resistance values. COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 要解决的问题：即使当在输入信号的信号电平中出现相关偏移时也抑制偏移。 解决方案：偏移消除装置S1被配置为互补地改变用于差分放大电路的运算放大器20A的反相输入端和信号输入端IN之间的电阻值，以及反相输入端和输出端之间的电阻值 端子，逐渐降低输出信号Vout的电位，并最终以电位变为“0”的方式指定每个电阻值，并使用电阻值进行偏移消除。 版权所有（C）2008，JPO＆INPIT

公开(公告)号：JP2006098305A

公开(公告)日：2006-04-13

申请号：JP2004286892

申请日：2004-09-30

Applicant: Yamaha Corp ,  ヤマハ株式会社

Inventor： YASUI SHOJI

IPC: G01R33/09 ,  H01L43/08

Abstract: PROBLEM TO BE SOLVED: To provide a magnetic measuring apparatus having an improvement in measurement precision.
SOLUTION: A magnetic sensor 11 measures the intensity of magnetism in the direction of a Z-axis. Output of the magnetic sensor 11 is amplified by amplifiers 62 and 63, and output of the amplifiers 62 and 63 is further differentially amplified by an amplifier 64. Output of a tilt sensor 12 is amplified by an amplifier 66. Output of the amplifiers 64 and 66 is directly connected to a terminal 68. The terminal 68 is connected to an input end of an A/D converter. The amplifiers 64 and 66 are each constituted of an amplifier having two output states of an active state and a high-impedance state. Input to the A/D converter is thereby executed by the direct connection of each output end to improve measurement precision in comparison with the case of switching through the use of switches.
COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种测量精度提高的磁性测量装置。 解决方案：磁传感器11测量在Z轴方向上的磁力强度。 磁传感器11的输出由放大器62和63放大，放大器62和63的输出由放大器64进一步差分放大。倾斜传感器12的输出由放大器66放大。放大器64和 66直接连接到端子68.端子68连接到A / D转换器的输入端。 放大器64和66各自由具有有源状态和高阻抗状态的两个输出状态的放大器构成。 与通过使用开关切换的情况相比，通过直接连接各输出端来实现对A / D转换器的输入，以提高测量精度。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：JP2005130092A

公开(公告)日：2005-05-19

申请号：JP2003361815

申请日：2003-10-22

Applicant: Yamaha Corp ,  ヤマハ株式会社

Inventor： YASUI SHOJI

IPC: H03K3/354 ,  H03K3/011 ,  H03K3/03

CPC classification number: H03K3/011 ,  H03K3/0315

Abstract: PROBLEM TO BE SOLVED: To provide a voltage controlled oscillator in which an oscillation frequency and an oscillation amplitude hardly suffer from an influence of a change in power supply voltage.
SOLUTION: The odd number of logical inverting circuits (INV1-INV5) are connected in series, and the output of the final stage logical inverting circuit is fed back and input into the initial stage logical inverting circuit. In this way, sources of source follower FETs (P21-P25) of corresponding drain ground are connected to each of electric source side nodes of the logical inverting circuits forming a ring oscillator (102) having an oscillation function, and a stable bias voltage is applied to each gate of the source follower FETs.
COPYRIGHT: (C)2005,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种电压控制振荡器，其中振荡频率和振荡幅度几乎不受电源电压变化的影响。

解决方案：逻辑反相电路（INV1-INV5）的奇数串联，最后一级逻辑反相电路的输出反馈并输入到初级逻辑反相电路。 以这种方式，相应的漏极接地的源极跟随FET（P21-P25）的源极连接到形成具有振荡功能的环形振荡器（102）的逻辑反相电路的每个电源侧节点，并且稳定的偏置电压为 施加到源极跟随器FET的每个栅极。 版权所有（C）2005，JPO＆NCIPI

公开(公告)号：JP2001126411A

公开(公告)日：2001-05-11

申请号：JP30461099

申请日：1999-10-26

Applicant: YAMAHA CORP

Inventor： TOMIMATSU KIYOYUKI ,  TSUCHIDO TOSHIAKI ,  YASUI SHOJI ,  SHIRAYANAGI TORU ,  ISHIJIMA KIYOSHI

IPC: G11B20/14 ,  H03L7/107

Abstract: PROBLEM TO BE SOLVED: To provide a PLL circuit for easily performing locking and making unlocking hard once locking is performed. SOLUTION: A data clock extraction circuit 12 extracts clock signals from an input data stream DF and outputs them through a selector 13 to a phase comparator 17a. The phase comparator 17a compares the phases of the clock signals and feedback signals and outputs the result through an LPF 20a to a VCO 21. The output of the VCO 21 is inputted through a frequency divider circuit to the phase comparator 17a. A filter control circuit 26 is a circuit for automatically setting the filter constant of the LPF 20a, sets the filter constant for accelerating the response speed of the LPF 17a in the case that the input data stream DF and the fed-back clock signals are not synchronized and sets the filter constant for lowering the response speed of the LPF 20a in the case that they are synchronized.

公开(公告)号：JP2006105870A

公开(公告)日：2006-04-20

申请号：JP2004295139

申请日：2004-10-07

Applicant: Yamaha Corp ,  ヤマハ株式会社

Inventor： YASUI SHOJI ,  OMURA MASAYOSHI ,  KANEKO MAKOTO

IPC: G01K7/00

Abstract: PROBLEM TO BE SOLVED: To provide a temperature sensor for compensating irregularity about a measured value to improve precision by providing a fuse memory to store an initial value and a compensated value and compensating the measured value to the values, and to provide a method of compensating the temperature sensor.
SOLUTION: In the temperature sensor 1, a control logic circuit 11 controls the temperature sensor 1. In assembling the temperature sensor 1, the control logic circuit 11 reads a result of measuring characteristics about circumferential temperature from a temperature sensor circuit 12, obtains the initial value and the compensated value from the result and stores them to the fuse memory 13. In addition, during operation of the temperature sensor 1, the control logic circuit 11 reads the initial value and the compensated value from the fuse memory 13, and compensates measuring values of the temperature sensor circuit 12 by using the values.
COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种温度传感器，用于通过提供熔丝存储器来存储初始值和补偿值并将测量值补偿到值来补偿关于测量值的不规则性，以提高精度，并提供 补偿温度传感器的方法。 解决方案：在温度传感器1中，控制逻辑电路11控制温度传感器1.在组装温度传感器1时，控制逻辑电路11从温度传感器电路12读取测量周围温度特性的结果， 从结果获得初始值和补偿值，并将其存储到熔丝存储器13.此外，在温度传感器1的操作期间，控制逻辑电路11从熔丝存储器13读取初始值和补偿值， 并通过使用这些值补偿温度传感器电路12的测量值。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：JP2006098307A

公开(公告)日：2006-04-13

申请号：JP2004286894

申请日：2004-09-30

Applicant: Yamaha Corp ,  ヤマハ株式会社

Inventor： YASUI SHOJI

IPC: G01R33/09 ,  H01L43/08

Abstract: PROBLEM TO BE SOLVED: To provide a magnetic measuring apparatus of low electric power consumption which makes measurements without depending on power voltage.
SOLUTION: An X-axis sensor 1 and a Y-axis sensor 2 are each used for measuring the intensity of magnetism in the direction of an X-axis and the intensity of magnetism in the direction of a Y-axis. Output of the X-axis sensor 1 and the Y-axis sensor 2 is amplified by amplifiers 24-26 and inputted to an A/D converter via a sample hold circuit 31. FETs 21 and 22 for turning each power supply line of the X-axis sensor 1 and the Y-axis sensor 2 on/off are provided and turned on only when the X-axis sensor 1 and the Y-axis sensor 2 are used. Resistors R1X-R3X and R1Y-R3Y for dividing the electrical potential difference between the sensors 1 and 2 are provided. Amplifiers 36 and 37 for amplifying voltages of nodes of the resistors are provided. Output of the amplifiers 36 and 37 is outputted to the A/D converter as a reference voltage.
COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种低功耗的磁测量装置，其不依赖于电源电压进行测量。 解决方案：X轴传感器1和Y轴传感器2分别用于测量X轴方向上的磁力强度和Y轴方向的磁强度。 X轴传感器1和Y轴传感器2的输出由放大器24-26放大并通过采样保持电路31输入到A / D转换器。用于转换X的每个电源线的FET 21和22 仅在使用X轴传感器1和Y轴传感器2时才提供开启/关闭Y轴传感器2和Y轴传感器2的开关。 提供用于分割传感器1和2之间的电位差的电阻器R1X-R3X和R1Y-R3Y。 提供用于放大电阻器节点电压的放大器36和37。 放大器36和37的输出作为参考电压输出到A / D转换器。 版权所有（C）2006，JPO＆NCIPI