公开(公告)号：KR20120015718A

公开(公告)日：2012-02-22

申请号：KR20100078086

申请日：2010-08-13

Applicant: SESOL CO LTD

Inventor： JEONG DONG HOON

IPC: H03M1/12

CPC classification number: H04N13/0007 ,  H03M1/66 ,  H03M2201/12 ,  H03M2201/19 ,  H04N13/0055

Abstract: PURPOSE: A digital to analog converting apparatus for 3d implementation is provided to watch 3D images in a conventional 2D TV by applying a function of implementing 3D to a digital to analog converting apparatus. CONSTITUTION: An RF(Radio Frequency) tuner(10) receives a broadcast signal. An AD converter(20) changes the broadcast signal received through the RF tuner into a digital signal. A TS(Transport Stream) parser(30) parses a transport stream which is transformed to the digital signal. A decoder(40) decodes a parsed signal. A 3D anaglyph converter(50) extracts a left-eye image and a right-eye image from a decoded signal. The 3D anaglyph converter generates 3D images by editing an extracted left-eye image and right-eye image. An DA converter(60) changes the 3D images into an analog signal.

Abstract translation: 目的：提供一种用于3d实现的数模转换装置，用于通过将实现3D的功能应用于数模转换装置来观看常规2D TV中的3D图像。 构成：RF（射频）调谐器（10）接收广播信号。 AD转换器（20）将通过RF调谐器接收的广播信号改变为数字信号。 TS（传输流）解析器（30）解析转换为数字信号的传输流。 解码器（40）解码解析的信号。 3D立体变换转换器（50）从解码信号中提取左眼图像和右眼图像。 3D立体图像转换器通过编辑提取的左眼图像和右眼图像来生成3D图像。 DA转换器（60）将3D图像改变为模拟信号。

公开(公告)号：KR1020140080900A

公开(公告)日：2014-07-01

申请号：KR1020120149943

申请日：2012-12-20

Applicant: 에스케이하이닉스 주식회사 ,  한양대학교 산학협력단

Inventor： 구자승 ,  권오경 ,  김민규

IPC: H03M1/12

CPC classification number: H03M3/342 ,  H03M1/002 ,  H03M1/12 ,  H03M2201/19 ,  H03M2201/62 ,  H04N5/378

Abstract: The present invention relates to an analog-to-digital converter (ADC) having a reduced area, while performing a correlated double sampling (CDS) operation. The ADC according to the present invention comprises a comparing unit outputting a result of comparison between a voltage of an input node and a comparison voltage; first to N^th capacitors having one end connected to the input node; and first to (N-1)^th voltage selecting units respectively corresponding to the second to N^th capacitors, and selecting one among a first reference voltage, a second reference voltage, and the comparison voltage and applying the selected voltage to the other end of a corresponding capacitor, wherein, during a first sampling operation, a first signal is sampled to the input node, during a first conversion operation, the first to (N-1)^th voltage selecting units select one among the first reference voltage and the second reference voltage in response to an output from the comparing unit, during a second sampling operation, the first to (N-1)^th voltage selecting units select a reference voltage not selected during the first conversion operation, among the first reference voltage and the second reference voltage, and applies a second signal having a level different from that of the first signal to the input node, and during a second conversion operation, a value sampled to the input node during the second sampling operation is converted into a digital signal.

Abstract translation: 本发明涉及在执行相关双重采样（CDS）操作的同时具有减小的面积的模数转换器（ADC）。 根据本发明的ADC包括输出输入节点的电压和比较电压之间的比较结果的比较单元; 第一至第N电容器，其一端连接到输入节点; 以及分别对应于第二至第N电容器的第一至第（N-1）个电压选择单元，并且从第一参考电压，第二参考电压和比较电压中选择一个，并将选择的电压施加到另一个 其中，在第一采样操作期间，第一信号被采样到输入节点，在第一转换操作期间，第一至第（N-1）第二电压选择单元选择第一参考电压 和第二参考电压，响应于来自比较单元的输出，在第二采样操作期间，第一至第（N-1）第二电压选择单元选择在第一转换操作期间未被选择的参考电压， 电压和第二参考电压，并且将具有与第一信号的电平不同的电平的第二信号施加到输入节点，并且在第二转换操作期间，对输入节点采样的值 在第二采样操作期间被转换为数字信号。

公开(公告)号：KR1020100039986A

公开(公告)日：2010-04-19

申请号：KR1020080099003

申请日：2008-10-09

Applicant: 주식회사 이투에스

Inventor： 윤주형 ,  이제윤

IPC: H03M1/12

CPC classification number: G11C27/02 ,  H03M1/12 ,  H03M2201/19

Abstract: PURPOSE: An apparatus for high speed sampling using an ad converter and a method therefore are provided to reduce the load of CPU by performing sampling in FPGA actively. CONSTITUTION: An AD converter is composed of AD converters(110,120,130,140) of four channels. The AD converter receives a control signal in order to performing the AD sampling from the FPGA part(200). The AD converter converts an analog signal outputted from a GAP sensor of a magnetic levitation propulsion train into a digital signal and performs sampling. The FPGA part outputs the control signal to the AD converter. The FPGA part records data outputted from the AD converter. The CPU(300) transmits a channel selection signal to the FPGA part.

Abstract translation: 目的：提供一种使用广告转换器进行高速采样的设备，因此提供了一种通过在FPGA中执行采样来降低CPU负载的方法。 构成：AD转换器由四个通道的AD转换器（110,120,130,140）组成。 AD转换器接收控制信号以便从FPGA部分（200）执行AD采样。 AD转换器将从磁悬浮推进列车的GAP传感器输出的模拟信号转换为数字信号并进行采样。 FPGA部分将控制信号输出到AD转换器。 FPGA部分记录从AD转换器输出的数据。 CPU（300）向FPGA部件发送信道选择信号。

公开(公告)号：KR1020000075129A

公开(公告)日：2000-12-15

申请号：KR1019990019534

申请日：1999-05-24

Applicant: 주식회사 아이 시 디 에스

Inventor： 이지태 ,  김동현 ,  이문용 ,  정재학

IPC: H03M1/00

CPC classification number: H03M1/001 ,  H03M2201/19 ,  H03M2201/932

Abstract: PURPOSE: An AD/DA converter is provided, which is constructed in a manner that weak current flowing through the printer port of a PC can drive an AD converter to realize a small-sized AD/DA converter and which collects and processes only effective data to automatize and control experimental apparatus. CONSTITUTION: An AD/DA converter is constructed in such a manner that a printer port(2), a DC power jack(3) and a communication buffer(4) are placed at the front part of a substrate(1') inside a body(1), and a detection diode(5), a module resistor(6), a rectifying diode(7) and a light emitting diode(8) are set at the front, back, left and right of the communication buffer. Transistors(9,14), a constant-voltage IC(10), an electrolytic condenser(11), a DA converter(12) and an OP AMP(13) are located at the left, right and front of the detection diode. A variable resistor(15), a first AD converter(16) and a second AD converter(17) are placed at the front of the OP AMP in a row, and an oscillator(18), a precise constant-voltage IC(10') and a PC connection jack(19) are formed at the left, right and side of the AD converters.

Abstract translation: 目的：提供一种AD / DA转换器，其结构是通过PC的打印机端口的弱电流驱动AD转换器来实现小型AD / DA转换器，并且仅收集和处理有效数据 自动化控制实验装置。 构成：AD / DA转换器构造成使得打印机端口（2），直流电源插座（3）和通信缓冲器（4）放置在基板（1'）的前部的内部 主体（1）和检测二极管（5），模块电阻（6），整流二极管（7）和发光二极管（8）设置在通信缓冲器的前，后，左和右。 晶体管（9,14），恒压IC（10），电解电容器（11），DA转换器（12）和OP AMP（13）位于检测二极管的左，右和前侧。 可变电阻器（15），第一AD转换器（16）和第二AD转换器（17）分别放置在OP AMP的前面，并具有振荡器（18），精密恒压IC（10 '）和PC连接插孔（19）形成在AD转换器的左，右和侧。