公开(公告)号：KR1020130095993A

公开(公告)日：2013-08-29

申请号：KR1020120017457

申请日：2012-02-21

Applicant: 금오공과대학교 산학협력단

Inventor： 어지훈 ,  장영찬

IPC: H03M1/12 ,  H03M1/64 ,  H03K5/08

CPC classification number: H03M1/64 ,  H03K5/08 ,  H03M1/0602 ,  H03M2201/2338 ,  H03M2201/615

Abstract: PURPOSE: A time-domain comparison apparatus using an input offset compensation technique is provided to secure the time delay difference by forming a delay line of a voltage control delay converting unit into two stages for easily removing the analog noise. CONSTITUTION: A time-domain comparison unit (100) includes a voltage control delay converting unit, a time amplifier, and an electronic magazine phase detection unit. The voltage control delay converting unit receives a first input signal, a second input signal, and a clock signal, and outputs a first output signal and a second output signal. The time amplifier receives the first and second output signals, and outputs a third output signal and a fourth output signal. The electronic magazine phase detection unit receives the third and fourth output signals, and outputs a fifth output signal and a sixth output signal. A finite-state machine unit (200) receives the fifth and sixth output signals, and outputs a first output bus. [Reference numerals] (AA) First output bus; (BB) First input signal; (CC) Fifth output signal; (DD) Clock signal; (EE) Sixth output signal; (FF) Second input signal

Abstract translation: 目的：提供一种使用输入偏移补偿技术的时域比较装置，通过将电压控制延迟转换单元的延迟线形成两级，以便容易地去除模拟噪声来确保时间延迟差。 构成：时域比较单元（100）包括电压控制延迟转换单元，时间放大器和电子盒相位检测单元。 电压控制延迟转换单元接收第一输入信号，第二输入信号和时钟信号，并输出第一输出信号和第二输出信号。 时间放大器接收第一和第二输出信号，并输出第三输出信号和第四输出信号。 电子仓相位检测单元接收第三和第四输出信号，并输出第五输出信号和第六输出信号。 有限状态机单元（200）接收第五和第六输出信号，并输出第一输出总线。 （附图标记）（AA）第一输出总线; （BB）第一输入信号; （CC）第五输出信号; （DD）时钟信号; （EE）第六输出信号; （FF）第二输入信号

公开(公告)号：KR1020140079095A

公开(公告)日：2014-06-26

申请号：KR1020120148685

申请日：2012-12-18

Applicant: 충북대학교 산학협력단

Inventor： 양병도 ,  박종호

IPC: H03M1/12

CPC classification number: H03M1/56 ,  H03M1/002 ,  H03M1/1245 ,  H03M2201/22 ,  H03M2201/2338

Abstract: The present invention relates to a slope type analog-to-digital converter. The converter includes: an input switch for switching V_REF voltage, GND voltage, and V_IN voltage; a voltage control unit for adding a V_REF voltage to V_C node voltage output from the input switch; a discharge current source for decreasing the V_C node voltage; a comparing unit for comparing the V_C node voltage and reference voltage; a control unit for controlling an operation of each block; and a counter for counting the number of clocks. The converter can move the operational ranges of the reference voltage and the discharge current source to a positive voltage range by increasing the voltage at the discharge node, and can prevent switch leakage current caused when a voltage level increased at one time is great.

Abstract translation: 本发明涉及斜率型模数转换器。 转换器包括：用于切换V_REF电压，GND电压和V_IN电压的输入开关; 电压控制单元，用于将V_REF电压加到从输入开关输出的V_C节点电压; 用于降低V_C节点电压的放电电流源; 用于比较V_C节点电压和参考电压的比较单元; 用于控制每个块的操作的控制单元; 以及用于计数时钟数的计数器。 转换器可以通过增加放电节点的电压将参考电压和放电电流源的工作范围移动到正电压范围，并可以防止一次电压电平升高时引起的开关漏电流。