公开(公告)号：KR1020150055303A

公开(公告)日：2015-05-21

申请号：KR1020130137474

申请日：2013-11-13

Applicant: 현대모비스 주식회사

Inventor： 유강현

IPC: H03M1/10 ,  H03M1/12

CPC classification number: H03M1/0621 ,  H03M1/1023 ,  H03M1/12 ,  H03M1/1255 ,  H03M2201/50 ,  H03M2201/63

Abstract: 본발명에따른 ADC의주파수오차보정장치는, 피크주파수와상기피크주파수에대응하는주파수오차값이저장된주파수오차저장부; ADC에연속신호가입력됨에따른상기 ADC의출력신호에대하여시간-주파수변환을수행하는시간-주파수변환부; 및상기시간-주파수변환부의출력값들로부터피크주파수를검출하고, 상기검출된피크주파수에대응하는주파수오차값을상기주파수오차저장부로부터획득하여, 상기검출된피크주파수와상기획득된주파수오차값을이용하여보정주파수를계산하는주파수오차보정부를포함하는것을특징으로한다.

Abstract translation: 根据本发明的用于校正模数转换器（ADC）的频率误差的装置包括频率误差存储部分，其存储对应于峰值频率的峰值频率和频率误差值; 根据对ADC的连续信号的应用对ADC的输出信号进行时间 - 频率变换的时频变换部，以及频率误差校正部，其从与来自所述ADC的检测出的峰值频率对应的频率误差值 频率误差存储部分，并且通过使用检测到的峰值频率和所获得的频率误差值来计算校正频率。

公开(公告)号：KR1020030002651A

公开(公告)日：2003-01-09

申请号：KR1020010038331

申请日：2001-06-29

Applicant: 에스케이하이닉스 주식회사

Inventor： 최윤희

IPC: H03M1/78

CPC classification number: H03M1/78 ,  H03M2201/50

Abstract: PURPOSE: A device for converting a digital signal into an analog signal is provided, which performs a digital/analog conversion function and also performs calculations like addition and subtraction, without using an additional circuit. CONSTITUTION: The device converts N>= 2 digital signals of M bits into analog signals. The device comprises M nodes(n21,n22,...,n2M), and (M-1) first capacitors being connected between the mth node and the (m+1)th node and having a capacitance of 2NC, and N second capacitor groups comprising M second transistors respectively, and the third transistor(105) whose one end is connected to the first node and another end is connected to a ground voltage port and has a capacitance of NC.

Abstract translation: 目的：提供一种用于将数字信号转换为模拟信号的装置，其执行数字/模拟转换功能，并且还执行加法和减法的计算，而不使用附加电路。 构成：器件将M位的N≥2数字信号转换为模拟信号。 该装置包括M个节点（n21，n22，...，n2M），和（M-1）个第一电容器连接在第m个节点和第（m + 1）个节点之间，并具有2NC的电容，N秒 电容器组分别包括M个第二晶体管，第三晶体管（105）的一端连接到第一节点，另一端连接到地电压端口并具有NC的电容。