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    Off-chip lockstep checking
    101.
    发明申请
    Off-chip lockstep checking 有权
    片外锁定检查

    公开(公告)号：US20050240810A1

    公开(公告)日：2005-10-27

    申请号：US10818994

    申请日：2004-04-06

    Applicant: Kevin Safford ,  Donald Soltis ,  Eric Delano

    Inventor： Kevin Safford ,  Donald Soltis ,  Eric Delano

    IPC: G06F11/00 ,  G06F11/16 ,  G06K19/067

    CPC classification number: G06F11/1641 ,  G06F11/1625 ,  G06F2201/845

    Abstract: A system is provided which includes a microprocessor comprising a first processing unit to generate a first output signal and a second processing unit to generate a second output signal, and comparison means, coupled to the microprocessor, to detect whether the first output signal differs from the second output signal.

    Abstract translation: 提供了一种系统，其包括微处理器，该微处理器包括产生第一输出信号的第一处理单元和用于产生第二输出信号的第二处理单元，以及耦合到微处理器的比较装置，以检测第一输出信号是否与 第二输出信号。

    Process monitoring in a computer system
    104.
    发明授权
    Process monitoring in a computer system 有权

    公开(公告)号：US06640203B2

    公开(公告)日：2003-10-28

    申请号：US09828495

    申请日：2001-04-05

    Applicant: Roger S. Brown ,  Karen C. Roles ,  Simon G. Applebaum

    Inventor： Roger S. Brown ,  Karen C. Roles ,  Simon G. Applebaum

    IPC: G06F1130

    CPC classification number: G06F9/4843 ,  G06F11/0715 ,  G06F11/1438 ,  G06F11/16 ,  G06F11/1641 ,  G06F11/28 ,  G06F11/3495 ,  G06F2201/845

    Abstract: The health of a process is monitored in a computer system by a process monitor. The monitored process (a configuration management system daemon (CMSD)) is not a child of the process monitor. The process monitor uniquely determines the identity of a monitored process and verifies the correct operation of the monitored process. In the absence of verification of the correct operation of the monitored process, the monitored process is caused to initiate. On successful initiation of the monitored process, the monitored process is uniquely identified to the system and is detached from the process monitor. Each monitored process is arranged to write, on initiation, its unique process identification information (PID) to a file, which file is then accessed by the process monitor to identify the process monitor. The process monitor can interrogate the operating system to verify correct operation of the CMSD. As an alternative, the process monitor could test whether the CMSD is functioning by making service requests to the CMSD.

    Replay mechanism for soft error recovery
    105.
    发明授权
    Replay mechanism for soft error recovery 有权
    软错误恢复重放机制

    公开(公告)号：US06625756B1

    公开(公告)日：2003-09-23

    申请号：US09469961

    申请日：1999-12-21

    Applicant: Edward T. Grochowski ,  William Rash ,  Nhon Quach

    Inventor： Edward T. Grochowski ,  William Rash ,  Nhon Quach

    IPC: G06F1100

    CPC classification number: G06F9/3885 ,  G06F9/28 ,  G06F9/3836 ,  G06F9/3857 ,  G06F9/3861 ,  G06F11/1407 ,  G06F11/1641 ,  G06F11/1658 ,  G06F2201/845

    Abstract: A processor is provided that implements a replay mechanism to recover from soft errors. The processor includes a protected execution unit, a check unit to detect errors in results generated by the protected execution unit, and a replay unit to track selected instructions issued to the protected execution unit. When the check unit detects an error, it triggers the replay unit to reissue the selected instructions to the protected execution unit. One embodiment of the replay unit provides an instruction buffer that includes pointers to track issue and retirement status of in-flight instructions. When the check unit indicates an error, the replay unit resets a pointer to reissue the instruction for which the error was detected.

    Abstract translation: 提供了一种处理器，其实现了从软错误中恢复的重放机制。 处理器包括受保护的执行单元，用于检测由受保护的执行单元产生的结果中的错误的检查单元，以及用于跟踪发送给受保护的执行单元的选定指令的重放单元。 当检查单元检测到错误时，它触发重放单元将所选择的指令重新发送到受保护的执行单元。 重放单元的一个实施例提供指令缓冲器，其包括跟踪飞行中指令的发行和退休状态的指针。 当检查单元指示错误时，重放单元重置指针以重新发出检测到错误的指令。

    Electronic switching system
    110.
    发明授权
    Electronic switching system 失效
    电子开关系统

    公开(公告)号：US3760364A

    公开(公告)日：1973-09-18

    申请号：US3760364D

    申请日：1971-11-04

    Applicant: NIPPON TELEGRAPH & TELEPHONE ,  NIPPON ELECTRIC CO ,  FUJTSU LTD ,  HITACHI LTD ,  OKI ELECTRIC IND CO LTD

    Inventor： YAMAUCHI M ,  HIROSE K ,  NAKAJO T ,  MUROGA K ,  SHIRASU H

    IPC: G06F11/20 ,  H04Q3/545 ,  G06F15/00 ,  G06F15/16

    CPC classification number: H04Q3/54533 ,  G06F11/1654 ,  G06F11/1675 ,  G06F2201/845

    Abstract: A stored program controlled electronic switching system provided with large capacity economical peripheral memory equipments, such as magnetic drums, in which a part of the basic memory content, not subject to high speed access time, is stored permanently and also continuously varying information is periodically copied for the purpose of backing up the random access main memory devices to decrease the number of the main memory devices. The switching system comprises data channel devices consisting of channel multiplexer and sub-channel equipment in order to obtain a standard interface scheme between the central control units and various input-output devices. The system further comprises fourwire type trunk link network to be controlled by the same central control units for obtaining wider system flexibility for the application of accommodating data switching facility, trunk switching facility, etc.

    Abstract translation: 具有大容量经济的外围存储设备（诸如磁鼓）的存储程序控制的电子交换系统被定期复制，其中基本存储器内容的一部分不受高速存取时间的永久存储以及连续变化的信息被周期性地复制 用于备份随机存取主存储器件以减少主存储器件的数量。 交换系统包括由信道多路复用器和子信道设备组成的数据信道设备，以便在中央控制单元和各种输入 - 输出设备之间获得标准接口方案。 该系统还包括由相同的中央控制单元控制的四线式中继链路网络，用于获得更广泛的系统灵活性，适用于适应数据交换设备，中继交换设备等。

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