公开(公告)号：US09576693B2

公开(公告)日：2017-02-21

申请号：US14346025

申请日：2012-09-10

Applicant: Yoshitaka Shibuya ,  Kazuhiko Fukamachi ,  Atsushi Kodama

Inventor： Yoshitaka Shibuya ,  Kazuhiko Fukamachi ,  Atsushi Kodama

IPC: B32B15/00 ,  H01B1/02 ,  B32B15/01 ,  C25D5/10 ,  C22C5/06 ,  C22C5/08 ,  C22C5/10 ,  C22C9/00 ,  C22C9/02 ,  C22C9/04 ,  C22C13/00 ,  C22C19/03 ,  C22C19/07 ,  C22C22/00 ,  C22C27/06 ,  C22C38/00 ,  C22C13/02 ,  H05K3/24 ,  C25D5/50 ,  C25D5/12 ,  C23C18/16 ,  H05K1/11 ,  H01R13/03 ,  C25D3/12 ,  C25D3/20 ,  C25D3/30 ,  C25D3/38 ,  C25D3/46 ,  C25D3/50 ,  C25D3/56 ,  C25D3/62 ,  C25D3/64

CPC classification number: H01B1/02 ,  B32B15/01 ,  B32B15/018 ,  C22C5/06 ,  C22C5/08 ,  C22C5/10 ,  C22C9/00 ,  C22C9/02 ,  C22C9/04 ,  C22C13/00 ,  C22C13/02 ,  C22C19/03 ,  C22C19/07 ,  C22C22/00 ,  C22C27/06 ,  C22C38/00 ,  C23C18/1651 ,  C23C18/1692 ,  C25D3/12 ,  C25D3/20 ,  C25D3/30 ,  C25D3/38 ,  C25D3/46 ,  C25D3/50 ,  C25D3/567 ,  C25D3/62 ,  C25D3/64 ,  C25D5/10 ,  C25D5/12 ,  C25D5/505 ,  H01R13/03 ,  H05K1/117 ,  H05K1/118 ,  H05K3/244 ,  H05K2201/0341 ,  Y10T428/12681 ,  Y10T428/12708 ,  Y10T428/12715 ,  Y10T428/12722

Abstract: There are provided a metal material for electronic component which has low insertability/extractability, low whisker formability, and high durability, and a method for manufacturing the metal material. The metal material 10 for electronic components has a base material 11, an A layer 14 constituting a surface layer on the base material 11 and formed of Sn, In or an alloy thereof, and a B layer 13 constituting a middle layer provided between the base material 11 and the A layer 14 and formed of Ag, Au, Pt, Pd, Ru, Rh, Os, Ir or an alloy thereof, wherein the surface layer (A layer) 14 has a thickness of 0.002 to 0.2 μm, and the middle layer (B layer) 13 has a thickness of 0.001 to 0.3 μm.

Abstract translation: 提供了具有低插入性/提取性，低晶须成形性和高耐久性的电子部件用金属材料以及金属材料的制造方法。 用于电子部件的金属材料10具有基材11，构成基材11的表层的A层14，其由Sn，In或其合金形成，B层13构成中间层， 材料11和A层14，由Ag，Au，Pt，Pd，Ru，Rh，Os，Ir或其合金形成，其中表面层（A层）14的厚度为0.002〜0.2μm， 中间层（B层）13的厚度为0.001〜0.3μm。

公开(公告)号：US09572250B2

公开(公告)日：2017-02-14

申请号：US13997464

申请日：2011-12-23

Applicant: Sang Myung Lee ,  Sung Woon Yoon ,  Hyuk Soo Lee ,  Sung Won Lee ,  Ki Do Chun

Inventor： Sang Myung Lee ,  Sung Woon Yoon ,  Hyuk Soo Lee ,  Sung Won Lee ,  Ki Do Chun

IPC: H05K3/46 ,  H05K1/02 ,  H05K3/06 ,  H05K3/38 ,  H05K3/42

CPC classification number: H05K1/0298 ,  H05K3/064 ,  H05K3/388 ,  H05K3/428 ,  H05K3/4647 ,  H05K3/4652 ,  H05K3/4682 ,  H05K2201/0341 ,  H05K2203/0376

Abstract: Disclosed are a printed circuit board and a method for manufacturing the same. The printed circuit board includes a core insulating layer, at least one via formed through the core insulating layer, an inner circuit layer buried in the core insulating layer, and an outer circuit layer on a top surface or a bottom surface of the core insulating layer, wherein the via includes a first part, a second part below the first part, a third part between the first and second parts, and at least one barrier layer including a metal different from a metal of the first to third parts. The inner circuit layer and the via are simultaneously formed so that the process steps are reduced. Since odd circuit layers are provided, the printed circuit board has a light and slim structure.

Abstract translation: 公开了一种印刷电路板及其制造方法。 印刷电路板包括芯绝缘层，至少一个通过芯绝缘层形成的通孔，埋在芯绝缘层中的内电路层，以及在芯绝缘层的顶表面或底表面上的外电路层 ，其中所述通孔包括第一部分，在所述第一部分下方的第二部分，所述第一部分和所述第二部分之间的第三部分，以及包含不同于所述第一至第三部分的金属的金属的至少一个阻挡层。 同时形成内部电路层和通孔，从而减少工艺步骤。 由于设置了奇数电路层，所以印刷电路板具有轻薄的结构。

公开(公告)号：US09510447B2

公开(公告)日：2016-11-29

申请号：US14799860

申请日：2015-07-15

Applicant: IBIDEN CO., LTD.

Inventor： Toshiki Furutani ,  Yasushi Inagaki

IPC: H05K1/09 ,  H05K1/11 ,  H05K3/10 ,  H05K3/40 ,  H05K3/00

CPC classification number: H05K1/09 ,  H05K1/0271 ,  H05K1/111 ,  H05K1/115 ,  H05K3/0017 ,  H05K3/103 ,  H05K3/205 ,  H05K3/4007 ,  H05K3/4038 ,  H05K2201/0341 ,  H05K2201/094 ,  H05K2203/0384 ,  Y02P70/611

Abstract: A printed wiring board includes an insulation layer, a first conductive layer embedded into first surface of the insulation layer, a second conductive layer formed on second surface of the insulation layer, a via conductor penetrating through the insulation layer and electrically connecting the first and second layers, and a solder-resist layer covering the first layer and having an opening structure forming an exposed structure of the first layer. The exposed structure is formed to connect an electronic component to the first layer, and the first layer has a barrier-metal layer and a metal layer on the first layer such that the barrier-metal layer is on surface of the first layer and includes metal different from metal forming the metal layer and that the metal layer is on surface of the barrier-metal layer in the exposed structure and protruding from the first surface of the insulation layer.

Abstract translation: 印刷布线板包括绝缘层，嵌入绝缘层的第一表面中的第一导电层，形成在绝缘层的第二表面上的第二导电层，穿过绝缘层的通孔导体，并将第一和第二 层，以及覆盖第一层并具有形成第一层的暴露结构的开口结构的阻焊层。 形成暴露结构以将电子部件连接到第一层，并且第一层在第一层上具有阻挡金属层和金属层，使得阻挡金属层在第一层的表面上并且包括金属 与形成金属层的金属不同，并且金属层位于暴露结构中的阻挡金属层的表面上并且从绝缘层的第一表面突出。

公开(公告)号：US09462698B2

公开(公告)日：2016-10-04

申请号：US13993463

申请日：2011-12-02

Applicant: Naoto Takahashi ,  Yasuyuki Yamamoto ,  Emi Ushioda

Inventor： Naoto Takahashi ,  Yasuyuki Yamamoto ,  Emi Ushioda

IPC: H05K1/09 ,  H05K3/06 ,  H05K3/10 ,  H05K3/38 ,  H05K1/03

CPC classification number: H05K3/06 ,  H05K1/0306 ,  H05K1/092 ,  H05K3/108 ,  H05K3/388 ,  H05K2201/0317 ,  H05K2201/0338 ,  H05K2201/0341 ,  Y10T428/24967 ,  Y10T428/265

Abstract: The present invention provides: a method for manufacturing a metallized substrate by which a fine pattern can be formed more easily; a metallized substrate manufactured by the method; and a metal paste composition to be used in the method. The metallized substrate has: a sintered nitride ceramic substrate (10); a titanium nitride layer (20) on the sintered substrate (10); an adhesion layer (30) on the titanium nitride layer (20); and a copper plating layer (40) on or above the adhesion layer (30), wherein the adhesion layer (30) contains copper and titanium, and has a thickness of no less than 0.1 μm and no more than 5 μm.

Abstract translation: 本发明提供一种金属化基板的制造方法，能够更容易地形成精细图案， 通过该方法制造的金属化基板; 以及该方法中使用的金属糊剂组合物。 金属化基板具有：烧结氮化物陶瓷基板（10）; 在所述烧结基板（10）上的氮化钛层（20）; 在氮化钛层上的粘合层（30）; 以及在所述粘合层（30）上或上方的镀铜层（40），其中所述粘合层（30）含有铜和钛，并且具有不小于0.1μm且不大于5μm的厚度。

公开(公告)号：US20160230289A1

公开(公告)日：2016-08-11

申请号：US15134672

申请日：2016-04-21

Applicant: Samsung Display Co., Ltd. ,  LTCAM CO., LTD.

Inventor： Bong-Yeon Kim ,  Jin-Ho Ju ,  Jun-Hyuk Woo ,  Jung-Hwan Song ,  Seok-Ho Lee ,  Seong-Sik Jeon ,  Jong-Su Han

IPC: C23F1/16 ,  C23F11/04 ,  C11D7/32 ,  C11D7/26 ,  C11D11/00 ,  C11D7/08

CPC classification number: C23F1/16 ,  C11D7/06 ,  C11D7/08 ,  C11D7/265 ,  C11D7/3209 ,  C11D7/3245 ,  C11D11/0047 ,  C23F11/04 ,  H01L21/02068 ,  H05K1/0306 ,  H05K3/064 ,  H05K3/26 ,  H05K3/388 ,  H05K2201/0317 ,  H05K2201/0341 ,  H05K2203/124 ,  H05K2203/125

Abstract: A cleaning composition includes about 0.01 to about 5 wt % of a chelating agent; about 0.01 to about 0.5 wt % of an organic acid; about 0.01 to about 1.0 wt % of an inorganic acid; about 0.01 to about 5 wt % of an alkali compound; and deionized water.

公开(公告)号：US09345143B2

公开(公告)日：2016-05-17

申请号：US14741545

申请日：2015-06-17

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Kotaro Kodani ,  Kentaro Kaneko ,  Kazuhiro Kobayashi

IPC: H05K3/02 ,  H05K3/10 ,  H01L21/48 ,  H01L23/498 ,  H05K1/11 ,  H05K3/46 ,  H05K3/00 ,  H05K3/20

CPC classification number: H05K3/10 ,  H01L21/4846 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/15174 ,  H05K1/113 ,  H05K3/00 ,  H05K3/205 ,  H05K3/4682 ,  H05K2201/0338 ,  H05K2201/0341 ,  H05K2201/09472 ,  H05K2201/10674 ,  H05K2203/0353 ,  H05K2203/0361 ,  H05K2203/0369 ,  H05K2203/0376 ,  H05K2203/1184 ,  Y10T29/49155 ,  H01L2224/0401

Abstract: A wiring board includes an electrode pad having a first surface and a second surface located on an opposite side from the first surface, a conductor pattern connected to the first surface of the electrode pad, and an insulator layer embedded with the electrode pad and the conductor pattern. The insulator layer covers an outer peripheral portion of the second surface of the electrode pad.

公开(公告)号：US20150156870A1

公开(公告)日：2015-06-04

申请号：US14514819

申请日：2014-10-15

Applicant: Hitachi Metals, Ltd.

Inventor： Hideyuki SAGAWA ,  Keisuke FUJITO ,  Takayuki TSUJI ,  Kotaro TANAKA ,  Hiromitsu KURODA

IPC: H05K1/09 ,  H05K3/10

CPC classification number: H05K3/282 ,  H05K3/06 ,  H05K3/244 ,  H05K2201/0341 ,  H05K2201/0355 ,  H05K2203/0315 ,  H05K2203/087 ,  Y10T29/49162

Abstract: A printed circuit board includes a substrate, and a wiring provided on the substrate. The wiring includes a copper-based metal wire provided on the substrate and a surface-treated layer provided on the copper-based metal wire. The copper-based metal wire includes mainly a copper. The surface-treated layer includes an amorphous layer including oxygen and a metal with a higher oxygen affinity than the copper.

Abstract translation: 印刷电路板包括基板和设置在基板上的布线。 布线包括设置在基板上的铜基金属线和设置在铜基金属线上的表面处理层。 铜基金属线主要包括铜。 表面处理层包括包含氧和具有比铜更高的氧亲和力的金属的非晶层。

公开(公告)号：US08987052B2

公开(公告)日：2015-03-24

申请号：US13755409

申请日：2013-01-31

Applicant: Seagate Technology LLC

Inventor： Ralph Kevin Smith

IPC: H01L21/00 ,  H01L23/00

CPC classification number: H01L24/32 ,  B23K1/0006 ,  B23K1/0016 ,  B23K1/008 ,  B23K2101/36 ,  G11B5/105 ,  G11B5/6088 ,  G11B2005/0021 ,  H01L24/83 ,  H01L2924/12041 ,  H01L2924/12042 ,  H05K3/305 ,  H05K3/3431 ,  H05K3/3457 ,  H05K3/3478 ,  H05K3/3494 ,  H05K2201/0317 ,  H05K2201/0341 ,  H05K2201/10984 ,  H05K2203/0278 ,  H05K2203/105 ,  H05K2203/107 ,  H05K2203/1163 ,  H05K2203/166 ,  H01L2924/00

Abstract: Sub-micron precision alignment between two microelectronic components can be achieved by applying energy to incite an exothermic reaction in alternating thin film reactive layers between the two microelectronic components. Such a reaction rapidly distributes localized heat to melt a solder layer and form a joint without significant shifting of components.

Abstract translation: 通过施加能量以在两个微电子部件之间的交替的薄膜反应层中引起放热反应，可以实现两个微电子部件之间的亚微米精确对准。 这种反应快速地分布局部热量以熔化焊料层并形成接头而不会显着移动部件。

公开(公告)号：US20150000966A1

公开(公告)日：2015-01-01

申请号：US14364013

申请日：2012-11-30

Applicant: LG INNOTEK CO., LTD.

Inventor： Yun Kyoung JO ,  Seol Hee LIM ,  Chang Hwa PARK ,  Sai Ran EOM ,  Ae Rim KIM

IPC: H05K1/09 ,  H05K3/18

CPC classification number: H05K1/092 ,  H05K3/182 ,  H05K3/188 ,  H05K3/244 ,  H05K2201/0341 ,  H05K2201/09436 ,  H05K2201/099 ,  Y10T29/49155

Abstract: Provided is a printed circuit board, including: a circuit pattern or a base pattern formed on an insulating layer; and a plurality of metal layers formed on the circuit pattern or the base pattern, wherein the metal layers includes: a silver metal layer formed of a metal material including silver; a first palladium metal layer formed at a lower part of the silver metal layer; and a second palladium metal layer formed at an upper part of the silver metal layer.

Abstract translation: 提供一种印刷电路板，包括：形成在绝缘层上的电路图案或基底图案; 以及形成在电路图案或基底图案上的多个金属层，其中金属层包括：由包括银的金属材料形成的银金属层; 形成在银金属层的下部的第一钯金属层; 以及形成在银金属层的上部的第二钯金属层。

公开(公告)号：US20140210110A1

公开(公告)日：2014-07-31

申请号：US13755409

申请日：2013-01-31

Applicant: SEAGATE TECHNOLOGY LLC

Inventor： Ralph Kevin Smith

IPC: H01L23/00

CPC classification number: H01L24/32 ,  B23K1/0006 ,  B23K1/0016 ,  B23K1/008 ,  B23K2101/36 ,  G11B5/105 ,  G11B5/6088 ,  G11B2005/0021 ,  H01L24/83 ,  H01L2924/12041 ,  H01L2924/12042 ,  H05K3/305 ,  H05K3/3431 ,  H05K3/3457 ,  H05K3/3478 ,  H05K3/3494 ,  H05K2201/0317 ,  H05K2201/0341 ,  H05K2201/10984 ,  H05K2203/0278 ,  H05K2203/105 ,  H05K2203/107 ,  H05K2203/1163 ,  H05K2203/166 ,  H01L2924/00

Abstract: Sub-micron precision alignment between two microelectronic components can be achieved by applying energy to incite an exothermic reaction in alternating thin film reactive layers between the two microelectronic components. Such a reaction rapidly distributes localized heat to melt a solder layer and form a joint without significant shifting of components.

Abstract translation: 通过施加能量以在两个微电子部件之间的交替的薄膜反应层中引起放热反应，可以实现两个微电子部件之间的亚微米精确对准。 这种反应快速地分布局部热量以熔化焊料层并形成接头而不会显着移动部件。