公开(公告)号：US20240357747A1

公开(公告)日：2024-10-24

申请号：US18354559

申请日：2023-07-18

Applicant: Microchip Technology Incorporated

Inventor： J. Andrew Kovats

IPC: H05K1/18 ,  H05K1/11 ,  H05K5/00

CPC classification number: H05K1/181 ,  H05K1/115 ,  H05K5/0091 ,  H05K2201/10674

Abstract: Methods may involve supporting a plurality of microelectronic dice on a printed circuit panel. Respective microelectronic dice of the plurality of microelectronic dice may be electrically connected to at least one via of the printed circuit panel. Microelectronic device packages may be singulated from the printed circuit panel, respective microelectronic device packages including at least one microelectronic die of the plurality of microelectronic dice and a portion of the printed circuit panel. Structures may include a plurality of microelectronic dice supported on a printed circuit panel. The printed circuit panel may include vias, subsets of the vias positioned for electrical connection to a respective microelectronic die of the plurality of microelectronic dice.

公开(公告)号：US20240276643A1

公开(公告)日：2024-08-15

申请号：US18643206

申请日：2024-04-23

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Sang Hoon KIM ,  Young Kuk KO ,  Gyu Mook KIM ,  Hea Sung KIM ,  Chi Won HWANG ,  Suk Chang HONG

IPC: H05K1/11 ,  H05K3/06 ,  H05K3/46

CPC classification number: H05K1/113 ,  H05K3/062 ,  H05K3/4644 ,  H05K2201/096 ,  H05K2201/10674

Abstract: The present disclosure relates to a printed circuit board and a method of manufacturing the same. The printed circuit board includes: an insulating layer; a plurality of pads disposed on the insulating layer; and a plurality of insulating walls that are disposed on the insulating layer and cover side surfaces of the plurality of pads, respectively, but are not disposed on upper surfaces of the plurality of pads. The plurality of insulating walls are disposed to be spaced apart from each other on the first insulating layer.

公开(公告)号：US12058806B2

公开(公告)日：2024-08-06

申请号：US17692486

申请日：2022-03-11

Applicant: SKYWORKS SOLUTIONS, INC.

Inventor： Shaul Branchevsky ,  Howard E. Chen ,  Anthony James Lobianco

IPC: H05K1/02 ,  H01L23/00 ,  H01L23/06 ,  H01L23/15 ,  H01L23/29 ,  H01L23/50 ,  H01L23/552 ,  H01L23/60 ,  H01L23/66 ,  H05K1/03 ,  H05K1/11 ,  H05K1/16 ,  H05K1/18 ,  H05K3/00 ,  H05K3/12 ,  H05K3/20 ,  H05K3/22 ,  H05K3/40 ,  H05K3/42 ,  H05K3/46 ,  H01L23/31 ,  H01L23/498

CPC classification number: H05K1/0216 ,  H01L23/06 ,  H01L23/552 ,  H01L24/94 ,  H05K1/0215 ,  H05K1/0218 ,  H05K1/0298 ,  H05K1/0306 ,  H05K1/115 ,  H05K1/181 ,  H05K3/005 ,  H05K3/1241 ,  H05K3/22 ,  H05K3/403 ,  H05K3/429 ,  H05K3/4644 ,  H01L23/15 ,  H01L23/3121 ,  H01L23/49822 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/92 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/92125 ,  H01L2924/00014 ,  H01L2924/15313 ,  H01L2924/181 ,  H01L2924/19105 ,  H05K3/0052 ,  H05K3/4629 ,  H05K2201/0715 ,  H05K2201/0919 ,  H05K2201/09563 ,  H05K2201/10098 ,  H05K2201/10674 ,  H01L2224/131 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/45099 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/73204 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2924/00

Abstract: Devices and methods related to metallization of ceramic substrates for shielding applications. In some embodiments, a ceramic assembly includes a plurality of layers, the assembly including a boundary between a first region and a second region, the assembly further including a selected layer having a plurality of conductive features along the boundary, each conductive feature extending into the first region and the second region such that when the first region and the second region are separated to form their respective side walls, each side wall includes exposed portions of the conductive features capable of forming electrical connection with a conductive shielding layer.

公开(公告)号：US11997788B2

公开(公告)日：2024-05-28

申请号：US17901406

申请日：2022-09-01

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Sang Hoon Kim ,  Young Kuk Ko ,  Gyu Mook Kim ,  Hea Sung Kim ,  Chi Won Hwang ,  Suk Chang Hong

IPC: H05K1/11 ,  H05K3/06 ,  H05K3/46

CPC classification number: H05K1/113 ,  H05K3/062 ,  H05K3/4644 ,  H05K2201/096 ,  H05K2201/10674

Abstract: The present disclosure relates to a printed circuit board and a method of manufacturing the same. The printed circuit board includes: an insulating layer; a plurality of pads disposed on the insulating layer; and a plurality of insulating walls that are disposed on the insulating layer and cover side surfaces of the plurality of pads, respectively, but are not disposed on upper surfaces of the plurality of pads. The plurality of insulating walls are disposed to be spaced apart from each other on the first insulating layer.

公开(公告)号：US20230345637A1

公开(公告)日：2023-10-26

申请号：US18182833

申请日：2023-03-13

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Yoshihiro KODAIRA ,  Yusuke SEKINO ,  Taichi ITOH

IPC: H05K1/18 ,  H01L23/00 ,  H01L25/18

CPC classification number: H05K1/181 ,  H01L24/48 ,  H01L25/18 ,  H05K2201/10674 ,  H01L2224/48137 ,  H01L2924/30101 ,  H01L2924/13055

Abstract: A semiconductor device includes a first insulated circuit board that is rectangular with first to fourth sides, including a first input wiring board and a first output wiring board each extending in a first direction parallel to the first side and being adjacent to each other. The first output wiring board includes a first output region electrically connected to a first output terminal and a first connection wiring region electrically connected to the output electrodes of the plurality of first semiconductor chips and being closer to the second side than is the first output region. The first connection wiring region has a first slit extending in the first direction from an end of the first connection wiring region at a side thereof where the first output region is located.

公开(公告)号：US11729910B2

公开(公告)日：2023-08-15

申请号：US17189762

申请日：2021-03-02

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Chan Hoon Ko

IPC: H05K1/11 ,  H05K1/18

CPC classification number: H05K1/111 ,  H05K1/185 ,  H05K2201/10515 ,  H05K2201/10674

Abstract: A printed circuit board includes a substrate including an external connection pad; and a metal post extending to the outside of the substrate in a thickness direction of the substrate from the external connection pad. The metal post may include a first post portion, elongated while having a substantially constant width, a second post portion extending to the outside of the substrate in the thickness direction of the substrate while having a narrow width, and a third post portion extending to the outside of the substrate in the thickness direction of the substrate from the second post portion while having substantially the same width as the first post portion. The third post portion may forma lower end portion of the metal post.

公开(公告)号：US20230253358A1

公开(公告)日：2023-08-10

申请号：US18302935

申请日：2023-04-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Sheng-Yu Wu ,  Tin-Hao Kuo ,  Chen-Shien Chen

IPC: H01L23/00 ,  H01L23/498 ,  H05K1/11 ,  H01L25/10 ,  H01L29/66 ,  H01L25/065 ,  H01L23/528

CPC classification number: H01L24/17 ,  H01L23/528 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/02 ,  H01L24/09 ,  H01L24/14 ,  H01L24/16 ,  H01L24/33 ,  H01L24/81 ,  H01L25/105 ,  H01L25/0657 ,  H01L29/66 ,  H05K1/111 ,  H01L23/3192 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/0235 ,  H01L2224/0401 ,  H01L2224/1308 ,  H01L2224/02375 ,  H01L2224/3003 ,  H01L2224/05073 ,  H01L2224/05166 ,  H01L2224/05548 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/14133 ,  H01L2224/16013 ,  H01L2224/16148 ,  H01L2224/16238 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/81385 ,  H01L2224/81815 ,  H01L2225/1047 ,  H01L2924/3512 ,  H01L2924/3841 ,  H01L2924/35121 ,  H05K2201/09727 ,  H05K2201/10674

Abstract: A package includes a first and a second package component. The first package component includes a first metal trace and a second metal trace at the surface of the first package component. The second metal trace is parallel to the first metal trace. The second metal trace includes a narrow metal trace portion having a first width, and a wide metal trace portion having a second width greater than the first width connected to the narrow metal trace portion. The second package component is over the first package component. The second package component includes a metal bump overlapping a portion of the first metal trace, and a conductive connection bonding the metal bump to the first metal trace. The conductive connection contacts a top surface and sidewalls of the first metal trace. The metal bump is neighboring the narrow metal trace portion.

公开(公告)号：US20230199967A1

公开(公告)日：2023-06-22

申请号：US18062229

申请日：2022-12-06

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Seiji SATO

IPC: H05K1/18

CPC classification number: H05K1/185 ,  H05K2201/0212 ,  H05K2201/10674 ,  H05K2201/10734 ,  H05K2201/10977

Abstract: An embedded printed circuit board includes a first substrate, a semiconductor chip mounted on the first substrate, a second substrate provided on the first substrate via the semiconductor chip so that the semiconductor chip is sandwiched between the first substrate and the second substrate, a first resin filled between the semiconductor chip and the first substrate and having a cladding portion covering a side surface of the semiconductor chip, and a second resin filled between the first substrate and the second substrate and encapsulating the semiconductor chip and the first resin. The first resin includes a protrusion protruding from the cladding portion toward the second substrate.

公开(公告)号：US20190122976A1

公开(公告)日：2019-04-25

申请号：US16228928

申请日：2018-12-21

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yu-Min Liang ,  Jiun Yi Wu

IPC: H01L23/498 ,  H01L23/48 ,  H01L23/00 ,  H05K1/02 ,  H05K1/11 ,  H05K3/40 ,  H01L21/66

CPC classification number: H01L23/49838 ,  H01L22/14 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49894 ,  H01L24/02 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/11614 ,  H01L2224/11622 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/13294 ,  H01L2224/133 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/1712 ,  H01L2224/17132 ,  H01L2224/81424 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81466 ,  H01L2224/81815 ,  H01L2924/01057 ,  H01L2924/01072 ,  H01L2924/05042 ,  H01L2924/0533 ,  H01L2924/0534 ,  H01L2924/05342 ,  H01L2924/05432 ,  H01L2924/05442 ,  H01L2924/05994 ,  H01L2924/14 ,  H01L2924/1531 ,  H01L2924/15787 ,  H01L2924/2064 ,  H01L2924/20641 ,  H05K1/0268 ,  H05K1/113 ,  H05K3/4007 ,  H05K3/4682 ,  H05K2201/0367 ,  H05K2201/096 ,  H05K2201/0989 ,  H05K2201/10674 ,  H05K2203/0353 ,  H01L2924/014 ,  H01L2924/00014

Abstract: A die and a substrate are provided. The die comprises at least one integrated circuit chip, and the substrate comprises first and second subsets of conductive pillars extending at least partially therethrough. Each of the first subset of conductive pillars comprises a protrusion bump pad protruding from a surface of the substrate, and the second subset of conductive pillars each partially form a trace recessed within the surface of the substrate. The die is coupled to the substrate via a plurality of conductive bumps each extending between one of the protrusion bump pads and the die.

公开(公告)号：US20180323163A1

公开(公告)日：2018-11-08

申请号：US16023292

申请日：2018-06-29

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Yu-Min Liang ,  Jiun Yi Wu

IPC: H01L23/00 ,  H01L21/48 ,  H01L23/498 ,  H01L25/065 ,  H01L25/00 ,  H05K3/40 ,  H05K1/11 ,  H05K3/46

CPC classification number: H01L24/16 ,  H01L21/4853 ,  H01L21/4857 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/49866 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/16157 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2225/06513 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/381 ,  H01L2924/3841 ,  H05K1/111 ,  H05K3/4007 ,  H05K3/4682 ,  H05K2201/0367 ,  H05K2201/10674 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/014

Abstract: An embodiment apparatus includes a dielectric layer, a conductive trace in the dielectric layer, and a bump pad. The conductive trace includes a first portion having an exposed top surface, wherein the exposed top surface is recessed from a top surface of the dielectric layer. Furthermore, the bump pad is disposed over and is electrically connected to a second portion of the conductive trace.