公开(公告)号：US5682078A

公开(公告)日：1997-10-28

申请号：US650368

申请日：1996-05-20

Applicant: Akira Shishido

Inventor： Akira Shishido

IPC: H01J1/304 ,  H01J3/02 ,  H01J19/24

CPC classification number: H01J3/022

Abstract: A field emission cold cathode structure has an insulation layer having two-dimensional arrays of cavities, with a gate electrode on the insulation layer and two-dimensional arrays of opening portions having a generally circular shape positioned over the cavities. Field emission cold cathodes within the cavities each has a cone-like shape with a pointed top. The tops of the field emission cold cathodes are off-center within the opening portions in horizontal directions toward a reference point positioned on the gate electrode, and the distances of the tops from centers of the opening portions are varied to increase in accordance with increase in distance of the field emission cold cathodes from the reference point. This causes deflections of electron beams emitted from the tops of the field emission cold cathodes toward a concentration point which is positioned on a line extending from the reference point in a vertical direction to a surface of the gate electrode.

Abstract translation: 场发射冷阴极结构具有具有二维空腔阵列的绝缘层，绝缘层上具有栅极电极，并且具有位于空腔上方的大致圆形形状的开口部分的二维阵列。 腔内的场致发射冷阴极均具有带顶尖的锥形形状。 场发射冷阴极的顶部在开口部分的水平方向偏离位于栅极电极上的参考点，并且顶部与开口部分的中心的距离根据增加而变化 场发射冷阴极与参考点的距离。 这导致从场致发射冷阴极的顶部发射的电子束的偏转朝着从垂直方向上的参考点延伸到栅电极的表面的线上的浓度点。

公开(公告)号：US5666019A

公开(公告)日：1997-09-09

申请号：US524225

申请日：1995-09-06

Applicant: Michael D. Potter

Inventor： Michael D. Potter

IPC: H01J3/02 ,  H01J9/02 ,  H01J19/24

CPC classification number: H01J3/022 ,  H01J9/025

Abstract: An improved high-frequency field-emission microelectronic device (10) has a substrate (20) and an ultra-thin emitter electrode (30) extending parallel to the substrate and having an electron-emitting lateral edge (110) facing an anode (40) across an emitter-to-anode gap (120). A control electrode (70), having a lateral dimension only a minor fraction of the emitter-to-anode gap width, is disposed parallel to the emitter and spaced apart from the emitter by an insulator (60) of predetermined thickness. A vertical dimension of the control electrode is only a minor fraction of the height of the anode. The control electrode may substantially surround a portion of the anode, spaced from the anode in concentric relationship. Inter-electrode capacitance between the emitter and the control electrode has only an extremely small value, consisting of only a very small area term and a very small fringing-field term, thus allowing operation of the microelectronic device at higher frequencies or switching speeds than heretofore. Inter-electrode capacitance between the control electrode and the anode also has only an extremely small value, thus improving higher frequency performance further. Devices having a plurality of control electrodes may also be made with improved inter-electrode capacitance.

Abstract translation: 改进的高频场致发射微电子器件（10）具有基板（20）和平行于基板延伸并且具有面向阳极（40）的电子发射侧向边缘（110）的超薄发射极电极（30） ）跨越发射极到阳极间隙（120）。 具有横向尺寸仅为发射极 - 阳极间隙宽度的一小部分的控制电极（70）平行于发射器设置，并且通过预定厚度的绝缘体（60）与发射器间隔开。 控制电极的垂直尺寸只是阳极高度的一小部分。 控制电极可以基本上围绕阳极的一部分，与阳极以同心的方式间隔开。 发射极和控制电极之间的电极间电容仅具有非常小的值，仅由非常小的面积项和非常小的边缘场项构成，从而允许微电子器件在比以前更高的频率或开关速度下运行 。 控制电极和阳极之间的电极间电容也只有非常小的值，从而进一步提高了更高的频率性能。 具有多个控制电极的器件也可以具有改善的电极间电容。

公开(公告)号：US5665421A

公开(公告)日：1997-09-09

申请号：US725941

申请日：1996-10-08

Applicant: David L. Bergeron ,  John M. Macaulay ,  Roger W. Barton ,  Jeffrey D. Morse

Inventor： David L. Bergeron ,  John M. Macaulay ,  Roger W. Barton ,  Jeffrey D. Morse

IPC: H01J3/02 ,  H01J9/02 ,  B05D5/12

CPC classification number: B82Y10/00 ,  H01J3/022 ,  H01J9/025 ,  H01J2201/30403 ,  H01J2201/319

Abstract: A method is provided for creating gated filament structures for a field emission display. A multi-layer structure is provided that includes a substrate, an insulating layer, a metal gate layer positioned on a top surface of the insulating layer and a gate encapsulation layer positioned on a top surface of the metal gate layer. A plurality of gates are provided and define a plurality of apertures on the top of the insulating layer. A plurality of spacers are formed in the apertures at their edges on the top surface of the insulating layer. The spacers are used as masks for etching the insulating layer and form a plurality of pores in the insulating layer. The pores are plated with a filament material to create a plurality of filaments. The pores can be overplated to create the plurality of filaments. The filaments are vertically self-aligned in the pores.

Abstract translation: 提供了一种用于产生用于场致发射显示器的门控灯丝结构的方法。 提供了一种多层结构，其包括基板，绝缘层，位于绝缘层的顶表面上的金属栅极层和位于金属栅极层顶表面上的栅极封装层。 提供多个栅极并且在绝缘层的顶部上限定多个孔。 在绝缘层的顶表面上的边缘处的孔中形成多个间隔物。 间隔物用作蚀刻绝缘层并在绝缘层中形成多个孔的掩模。 用细丝材料电镀细孔以产生多根长丝。 孔可以被过度铺展以产生多根细丝。 细丝在孔中垂直自对准。

公开(公告)号：US5644187A

公开(公告)日：1997-07-01

申请号：US345040

申请日：1994-11-25

Applicant: James E. Jaskie ,  Lawrence N. Dworsky

Inventor： James E. Jaskie ,  Lawrence N. Dworsky

IPC: H01J1/30 ,  H01J1/304 ,  H01J3/02 ,  H01J1/46

CPC classification number: H01J3/022

Abstract: A an electron source utilizes a novel extraction grid conductor (20,40,41) to assist in focusing an electron beam emitted by the electron source. The extraction grid conductor (20,40,41) has a collimating conductor (29,31) that separate an extraction grid section (17,21,22) of the extraction grid conductor from conducting strips (26,24,32,33) that electrically connect the extraction grid section (17,21,22) to an external voltage source. The collimating conductor (29,31) creates an electric field that prevents emitted electrons from being attracted to the conducting strips (26,24,32,33) thereby maintaining the emitted electron beam in a substantially column-like configuration.

Abstract translation: 一个电子源利用新的提取栅格导体（20,40,41）来帮助聚焦由电子源发射的电子束。 提取栅格导体（20,40,41）具有将提取栅格导体的提取栅格部分（17,21,22）与导电条（26,24,32,33）分离的准直导体（29,31） 将所述提取格栅部分（17,21,22）电连接到外部电压源。 准直导体（29,31）产生电场，防止发射的电子被吸引到导电条（26,24,32,33），从而将发射的电子束保持在基本上呈列状的构型。

公开(公告)号：US5572042A

公开(公告)日：1996-11-05

申请号：US226251

申请日：1994-04-11

Applicant: Michael E. Thomas ,  Irfan Saadat

Inventor： Michael E. Thomas ,  Irfan Saadat

IPC: H01J3/02 ,  H01J21/10 ,  H01L29/06 ,  H01J1/02

CPC classification number: H01J21/105 ,  H01J3/022

Abstract: An integrated circuit electronic grid device includes first and second metal layers wherein the metal layers are vertically disposed within a substitute. A layer of a dielectric medium is disposed between the metal layers and a third metal layer is spaced apart from the second metal layer and insulated from the second metal layer by another layer of a dielectric medium. The first and second metal layers are biased with respect to each other to cause a flow electrons from the first metal layer toward the second metal layer. The second metal layer is provided with a large plurality of holes adapted for permitting the flow of electrons to substantially pass therethrough and to travel toward the third metal layer. A fourth metal layer is spaced apart from the third metal layer to collect the electrons wherein the third metal layer is also provided with a large plurality of holes to permit the electrons to flow therethrough and continue toward the fourth metal layer. The third metal layer is coupled to a lead to permit it to serve as a control grid for modulating the flow of electrons.

Abstract translation: 集成电路电子栅格器件包括第一和第二金属层，其中金属层垂直地设置在替代物内。 介电介质层设置在金属层之间，并且第三金属层与第二金属层间隔开并且通过另一层电介质与第二金属层绝缘。 第一和第二金属层相对于彼此偏置以使电子从第一金属层流向第二金属层。 第二金属层设置有多个适于允许电子流动基本上穿过其并朝向第三金属层行进的多个孔。 第四金属层与第三金属层间隔开以收集电子，其中第三金属层还设置有大量多个孔，以允许电子流过其中并继续朝向第四金属层。 第三金属层耦合到引线以允许其用作调节电子流的控制栅格。

公开(公告)号：US5534744A

公开(公告)日：1996-07-09

申请号：US337528

申请日：1994-11-08

Applicant: Thierry Leroux ,  Robert Meyer

Inventor： Thierry Leroux ,  Robert Meyer

IPC: H01J29/46 ,  H01J1/304 ,  H01J3/02 ,  H01J31/12 ,  G09G3/10

CPC classification number: H01J3/022 ,  H01J31/127 ,  H01J2201/319

Abstract: Micropoint emissive cathode electron source and field emission-excited cathodoluminescence display means using said source. The source comprises a series of electrodes (5) acting as cathode conductors and carrying micropoints (12) and a series of electrodes (10g) acting as grids, each of the electrodes of one of the series being in contact with a resistive layer (7) and having a lattice structure, so that there are consequently tracks (5a) which intersect and define first openings (6), each of the electrodes of the other series having second openings (11) which are displaced with respect to the first openings.

Abstract translation: 微点发射阴极电子源和场发射激发阴极发光显示装置使用所述源。 源包括一系列用作阴极导体的电极（5），并承载微点（12）和一系列电极（10g），其中一个电极的每个电极与电阻层（7 ）并且具有格子结构，使得因此存在与第一开口（6）相交并限定第一开口（6）的轨道（5a），另一系列的每个电极具有相对于第一开口移位的第二开口（11）。

公开(公告)号：US5534743A

公开(公告)日：1996-07-09

申请号：US301473

申请日：1994-09-07

Applicant: Gary W. Jones ,  Steven M. Zimmerman

Inventor： Gary W. Jones ,  Steven M. Zimmerman

IPC: G01R33/10 ,  G02B27/00 ,  G02B27/01 ,  G02B27/22 ,  G09G3/00 ,  H01J1/304 ,  H01J3/02 ,  H01J9/02 ,  H01J9/24 ,  H01J29/02 ,  H01J29/94 ,  H01J31/12 ,  H04N5/70 ,  H04N5/74 ,  H04N13/00 ,  H01J1/02

CPC classification number: G09G3/001 ,  G01R33/10 ,  G02B27/017 ,  G02B27/0172 ,  G02B27/0176 ,  G02B27/2235 ,  H01J1/3042 ,  H01J29/028 ,  H01J29/94 ,  H01J3/022 ,  H01J31/127 ,  H01J9/025 ,  H04N13/0422 ,  H04N13/0438 ,  H04N13/044 ,  H04N13/0459 ,  H04N13/0497 ,  H04N5/7408 ,  G02B2027/0132 ,  G02B2027/0136 ,  H01J2201/304 ,  H01J2201/30426 ,  H01J2201/30457 ,  H01J2201/319 ,  H01J2209/385 ,  H01J2329/00 ,  H01J2329/8625 ,  H01J2329/863 ,  H01J2329/864 ,  H04N13/0059 ,  H04N13/0285 ,  H04N13/0427 ,  H04N13/0456 ,  H04N5/70 ,  H04N5/7491

Abstract: A field emitter structure, comprising: a base substrate; a field emitter element on the base substrate; a multilayer differentially etched dielectric stack circumscribingly surrounding the field emitter element on the base substrate; and a gate electrode overlying the multilayer differentially etched dielectric stack, and in circumscribing spaced relationship to the field emitter element. Also disclosed are electron source devices, comprising an electron emitter element including a material selected from the group consisting of leaky dielectric materials, and leaky insulator materials, as well as electron source devices, comprising an electron emitter element including an insulator material doped with a tunneling electron emission enhancingly effective amount of a dopant species, and thin film triode devices.

Abstract translation: 一种场发射器结构，包括：基底; 基底基板上的场发射体元件; 围绕基底衬底上的场发射体元件的多层差分蚀刻介质堆叠; 以及覆盖多层差分蚀刻的电介质叠层的栅电极，并且以与外界发射极元件间隔开的关系。 还公开了电子源器件，其包括电子发射器元件，其包括选自由漏电介质材料和漏绝缘体材料组成的组的材料，以及电子源器件，其包括电子发射器元件，该电子发射器元件包括掺杂有隧道 电子发射增加有效量的掺杂物种类和薄膜三极管器件。

公开(公告)号：US5489933A

公开(公告)日：1996-02-06

申请号：US829882

申请日：1992-02-03

Applicant: Keiichi Betsui ,  Hiroshi Inoue ,  Shin'ya Fukuta

Inventor： Keiichi Betsui ,  Hiroshi Inoue ,  Shin'ya Fukuta

IPC: H01J1/304 ,  H01J3/02 ,  H01J9/02 ,  H01J31/12 ,  B41J2/435 ,  G09G3/10

CPC classification number: H01J9/025 ,  H01J1/3042 ,  H01J3/022 ,  H01J31/127

Abstract: In a field emission microcathode array, a plurality of cones are arranged in a plurality of blocks, each of plural cones, on the main surface of a substrate, each cone having a sharp tip. A plurality of gate electrode portions respectively correspond to the blocks, each portion having a plurality of openings therein corresponding to the plurality of cones of the respective block, each opening being aligned with and disposed in surrounding relationship relative to the corresponding tip of the respectively associated cone. A plurality of lead electrodes, each configured as a fuse, are respectively connected to the plurality of gate electrode portions and each lead electrode provides an independent connection of the respective gate electrode portion to the common power source. In another embodiment, each gate electrode portion and wiring films connected thereto have respectively high and low resistances. In a further embodiment, each gate electrode portion includes openings of different sizes surrounding tips of the cones.

Abstract translation: 在场致发射微阴极阵列中，在基板的主表面上的多个块（多个锥体）中设置多个锥体，每个锥体具有尖锐的尖端。 多个栅电极部分别对应于块，每个部分在其中具有多个开口，其中对应于相应块的多个锥，每个开口与相应的相应 锥体。 分别连接到多个栅电极部分的多个引线电极，各自构成熔丝，并且每个引线电极提供相应的栅电极部分与公共电源的独立连接。 在另一个实施例中，每个栅电极部分和与其连接的布线膜分别具有高电阻和低电阻。 在另一实施例中，每个栅电极部分包括围绕锥体尖端的不同尺寸的开口。

公开(公告)号：US5396150A

公开(公告)日：1995-03-07

申请号：US84484

申请日：1993-07-01

Applicant: Biing-Seng Wu ,  Jammy C.-M. Huang

Inventor： Biing-Seng Wu ,  Jammy C.-M. Huang

IPC: H01J3/02 ,  H01J9/02 ,  H01J1/30

CPC classification number: H01J3/022 ,  H01J9/025 ,  H01J2201/319 ,  H01J2329/00

Abstract: A high resolution matrix addressed flat panel display having single field emission microtip redundancy is formed. A dielectric base substrate is provided. Parallel, spaced conductors acting as cathode columns for the display are formed upon the substrate. A layer of insulation is located over the cathode columns. Parallel, spaced conductors acting as gate lines for the display is formed over the layer of insulation at a right angle to the cathode columns. The intersections of the cathode columns and gate lines are the pixels of the display. A plurality of openings at the pixels extend through the insulating layer and gate lines. At each of the pixels are a plurality of field emission microtips connected to and extending up from the cathode conductor columns and into the plurality of openings. There is a circular resistive layer surrounding each of the field emission microtips to obtain emission uniformity by sustaining the cathode to gate voltage.

Abstract translation: 形成具有单场发射微尖头冗余的高分辨率矩阵寻址平板显示器。 提供介电基底基板。 作为显示器的阴极柱的平行，间隔的导体形成在基板上。 绝缘层位于阴极柱之上。 作为显示器的栅极线的平行的隔开的导体以与阴极柱成直角的绝缘层形成。 阴极柱和栅极线的交点是显示器的像素。 像素处的多个开口延伸穿过绝缘层和栅极线。 在每个像素处是连接到阴极导体柱并且向上延伸到多个开口中的多个场发射微尖端。 围绕每个场发射微尖端的圆形电阻层通过将阴极维持在栅极电压来获得发射均匀性。

公开(公告)号：US5394006A

公开(公告)日：1995-02-28

申请号：US177521

申请日：1994-01-04

Applicant: David N.-C. Liu

Inventor： David N.-C. Liu

IPC: H01J3/02 ,  H01J9/02 ,  B44C1/22 ,  C23F1/02 ,  H01L31/00

CPC classification number: H01J3/022 ,  H01J9/025

Abstract: A method of forming a self-aligned gated field emitter with reduced gate opening and uniform gate height, on a substrate, is described. A field emitter is formed on the substrate. A thin, conformal dielectric layer is formed over the field emitter and the substrate. A thick dielectric layer is formed over the thin, conformal dielectric layer. The thick dielectric layer is planarized. The thick dielectric layer is etched back. A conductive layer is formed over the thick dielectric layer. The conductive layer is planarized and then etched back. The field emitter is exposed by forming an opening in the conductive layer, by removing the portion of the thin, conformal dielectric layer above and around the top of the field emitter.

Abstract translation: 描述了在衬底上形成具有减小的栅极开口和均匀栅极高度的自对准栅控场致发射体的方法。 在基板上形成场致发射体。 在场致发射体和衬底上形成薄的保形介电层。 在薄的共形介电层上形成厚的介电层。 厚电介质层被平坦化。 厚电介质层被回蚀。 导电层形成在厚电介质层上。 导电层被平坦化，然后被回蚀。 通过在场致发射体的顶部和周围去除薄的共形绝缘层的部分，在导电层中形成开口来暴露场发射体。