公开(公告)号：US20130120074A1

公开(公告)日：2013-05-16

申请号：US13293361

申请日：2011-11-10

Applicant: Chengjie ZUO ,  Changhan Yun ,  Chi Shun Lo ,  Jonghae Kim

Inventor： Chengjie ZUO ,  Changhan Yun ,  Chi Shun Lo ,  Jonghae Kim

IPC: H03B5/36 ,  H01R43/00

CPC classification number: H03B5/1243 ,  H03B5/1262 ,  H03B5/30 ,  H03B5/368 ,  H03B2200/0048 ,  H03B2201/0208 ,  Y10T29/49117

Abstract: A multiple frequency reconfigurable voltage controlled oscillator (VCO) (136) includes a variable capacitance device (112), an inductor (116) coupled in parallel with the variable capacitance device (112), and at least two circuit paths (118, 120, 122) coupled in parallel with the variable capacitance device (112) and the inductor (116). The circuit paths (118, 120, 122) each include a piezoelectric laterally vibrating resonator (126, 130, 134) and a switch (124, 128, 132) for selectably coupling each piezoelectric laterally vibrating resonator (126, 130, 134) in parallel with the inductor (116) and variable capacitance device (112).

Abstract translation: 多频可重构压控振荡器（VCO）（136）包括可变电容装置（112），与可变电容装置（112）并联耦合的电感器（116）和至少两个电路路径（118,120， 122）与所述可变电容器件（112）和所述电感器（116）并联耦合。 电路路径（118,120,122）各自包括压电侧向振动谐振器（126,130,134）和开关（124,128,132），用于将每个压电横向振动谐振器（126,130,134）可选地耦合在 与电感器（116）和可变电容器件（112）平行。

公开(公告)号：US20130009714A1

公开(公告)日：2013-01-10

申请号：US13614624

申请日：2012-09-13

Applicant: Yu NISHITANI ,  Yukihiro KANEKO ,  Michihito UEDA

Inventor： Yu NISHITANI ,  Yukihiro KANEKO ,  Michihito UEDA

IPC: H03B5/24

CPC classification number: H03B5/20 ,  H01L27/0682 ,  H01L28/20 ,  H01L28/40 ,  H01L28/56 ,  H03B5/24 ,  H03B2200/004 ,  H03B2201/02 ,  H03B2201/0208

Abstract: A resistance-capacitance oscillation circuit comprises an amplifier and a phase shifting circuit. The phase shifting circuit comprises at least three resistance-capacitance circuit elements, each of which comprises a resistance and a capacitor. At least one of the resistance-capacitance circuit elements comprises a variable resistance and a variable capacitor. The variable resistance is formed of a first electrode, a second electrode, a part of a semiconductor film, a part of a ferroelectric film, and a fourth electrode. The variable capacitor is formed of the second electrode, a third electrode, a fifth electrode, another part of the ferroelectric film, another part of the semiconductor film, and a paraelectric film.

Abstract translation: 电阻 - 电容振荡电路包括放大器和移相电路。 相移电路包括至少三个电阻 - 电容电路元件，每个电阻电容元件包括电阻和电容器。 电阻 - 电容电路元件中的至少一个包括可变电阻和可变电容。 可变电阻由第一电极，第二电极，半导体膜的一部分，铁电体膜的一部分和第四电极形成。 可变电容器由第二电极，第三电极，第五电极，铁电体膜的另一部分，半导体膜的另一部分和顺电膜形成。

公开(公告)号：US08046621B2

公开(公告)日：2011-10-25

申请号：US11860076

申请日：2007-09-24

Applicant: Ahmadreza Rofougaran

Inventor： Ahmadreza Rofougaran

IPC: G06F1/04

CPC classification number: H03B19/00 ,  H03B2201/0208

Abstract: Aspects of a method and system for generation of signals up to extremely high frequency using a delay block are provided. In this regard, a first signal may be delayed, via at least a portion of a plurality of delay elements and via a variable capacitance, to generate a second signal that is 90° out of phase relative to the first signal. Additionally, the first signal and second signal may be mixed to generate a third signal, wherein a frequency of the third signal is twice a frequency of said first signal. The portion of the delay elements utilized for delaying the signal may be controlled via one or more switching elements. In this regard, one of the plurality of delay elements may be selected to output the second signal. Moreover, the portion of the delay elements utilized for delaying the signal may be programmably controlled.

Abstract translation: 提供了使用延迟块产生高达极高频率的信号的方法和系统的方面。 在这方面，第一信号可以经由多个延迟元件的至少一部分并且经由可变电容被延迟，以产生相对于第一信号相差90°的第二信号。 另外，第一信号和第二信号可以被混合以产生第三信号，其中第三信号的频率是所述第一信号的频率的两倍。 用于延迟信号的延迟元件的部分可以通过一个或多个开关元件来控制。 在这点上，可以选择多个延迟元件之一来输出第二信号。 此外，用于延迟信号的延迟元件的部分可以被可编程地控制。

公开(公告)号：US07948325B2

公开(公告)日：2011-05-24

申请号：US12259770

申请日：2008-10-28

Applicant: Ramon A. Gomez

Inventor： Ramon A. Gomez

IPC: H03L7/00

CPC classification number: H03L7/00 ,  H03B5/1212 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1243 ,  H03B5/1253 ,  H03B5/1265 ,  H03B5/1278 ,  H03B2200/0046 ,  H03B2200/0048 ,  H03B2200/005 ,  H03B2201/02 ,  H03B2201/0208 ,  H03B2201/025 ,  H03D7/165 ,  H03D7/18 ,  H03J5/244 ,  H03J2200/10 ,  H03L7/0898 ,  H03L7/093 ,  H03L7/099 ,  H03L7/10 ,  H03L7/107 ,  H03L7/1072 ,  H03L7/18

Abstract: A gain compensator compensates for the gain variation of a varactor-tuned voltage tuned oscillator (VCO) in a phase lock loop (PLL). The VCO includes a parallel LC circuit having multiple fixed capacitors that can be switched-in or switched-out of the LC circuit according to a capacitor control signal to perform band-select tuning of the VCO. The gain compensator compensates for the variable VCO gain by generating a charge pump reference current that is based on the same capacitor control signal that controls the fixed capacitors in the LC circuit. The gain compensator generates the charge pump reference current by replicating a reference scale current using unit current sources. The number of times the reference scale current is replicated is based on the fixed capacitance that is switched-in to the LC circuit and therefore the frequency band of the PLL. The reference scale current is generated based on a PLL control that specifics certain PLL characteristics such as reference frequency, loop bandwidth, and loop damping. Therefore, the reference pump current can be efficiently optimized for-changing PLL operating conditions, in addition to compensating for variable VCO gain.

Abstract translation: 增益补偿器补偿锁相环（PLL）中变容二极管调谐电压调谐振荡器（VCO）的增益变化。 VCO包括具有多个固定电容器的并联LC电路，其可以根据电容器控制信号切换或切换出LC电路，以执行VCO的频带选择调谐。 增益补偿器通过产生基于控制LC电路中的固定电容器的相同电容器控制信号的电荷泵参考电流来补偿可变VCO增益。 增益补偿器通过使用单位电流源复制参考刻度电流来产生电荷泵参考电流。 参考比例电流复制的次数是基于切换到LC电路的固定电容，因此是PLL的频带。 参考比例电流是基于特定于参考频率，环路带宽和环路阻尼等特定PLL特性的PLL控制产生的。 因此，除了补偿可变VCO增益之外，参考泵电流可以有效地优化用于改变PLL工作条件。

公开(公告)号：US20100225408A1

公开(公告)日：2010-09-09

申请号：US12397060

申请日：2009-03-03

Applicant: Ahmadreza Rofougaran ,  Maryam Rofougaran

Inventor： Ahmadreza Rofougaran ,  Maryam Rofougaran

IPC: G01D5/20

CPC classification number: H01L23/49822 ,  H01L23/66 ,  H01L2223/6677 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/15321 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1243 ,  H03B5/1268 ,  H03B5/1296 ,  H03B2200/0048 ,  H03B2201/0208 ,  H03B2201/0216 ,  H03L7/085 ,  H03L7/099 ,  H03L7/1806 ,  H01L2224/0401

Abstract: Methods and systems for VCO impedance control to optimize performance, efficiency, and power consumption are disclosed and may include selectively coupling one of a plurality of taps on a multi-tap inductive load to a voltage controlled oscillator (VCO) on a chip comprising a plurality of transmitters and receivers. The multi-tap inductive load may comprise a multi-tap transformer or transmission line, which may be integrated on the chip, or may be integrated on a package to which the chip is coupled. A voltage swing at an output of the VCO and/or a current in the VCO may be adjusted by configuring a load of the VCO utilizing the multi-tap inductive load. The multi-tap inductive load may be coupled to the VCO utilizing one or more CMOS switches.

Abstract translation: 公开了用于优化性能，效率和功率消耗的VCO阻抗控制的方法和系统，并且可以包括选择性地将多抽头电感性负载上的多个抽头之一耦合到包括多个电感的芯片上的压控振荡器（VCO） 的发射机和接收机。 多抽头电感负载可以包括可以集成在芯片上的多抽头变压器或传输线，或者可以集成在芯片耦合到的封装上。 可以通过利用多抽头电感负载来配置VCO的负载来调整VCO的输出端和/或VCO中的电流的电压摆幅。 多抽头电感负载可以利用一个或多个CMOS开关耦合到VCO。

公开(公告)号：US07696833B2

公开(公告)日：2010-04-13

申请号：US11699025

申请日：2007-01-29

Applicant: Toshimasa Numata ,  Alejandro Puel ,  Patricio Dauguet ,  Xinghui Cai

Inventor： Toshimasa Numata ,  Alejandro Puel ,  Patricio Dauguet ,  Xinghui Cai

IPC: H03B5/18 ,  H03B9/14

CPC classification number: H03B5/1847 ,  H01L2224/16225 ,  H01L2924/16152 ,  H03B2200/0008 ,  H03B2200/0022 ,  H03B2201/0208

Abstract: An oscillator includes a first oscillating portion that outputs a first oscillation signal having a first oscillation frequency through a first intermediate node to an output terminal, a mounting portion that includes an insulating layer and that mounts the first oscillating portion, a first line provided in the insulating layer and coupled between the first intermediate node and ground, a second line provided in the insulating layer and coupled between the first intermediate node and a power supply terminal, and a third line provided in the insulating layer and coupled between the first intermediate node and the output terminal.

Abstract translation: 振荡器包括：第一振荡部分，其通过第一中间节点向输出端子输出具有第一振荡频率的第一振荡信号;安装部分，其包括绝缘层并且安装所述第一振荡部分;第一线路， 绝缘层并且耦合在所述第一中间节点和地之间，设置在所述绝缘层中并耦合在所述第一中间节点和电源端子之间的第二线，以及设置在所述绝缘层中并耦合在所述第一中间节点和 输出端子。

公开(公告)号：US20090243743A1

公开(公告)日：2009-10-01

申请号：US12059826

申请日：2008-03-31

Applicant: Marcel A. Kossel ,  Thomas E. Morf ,  Jonas R. Weiss

Inventor： Marcel A. Kossel ,  Thomas E. Morf ,  Jonas R. Weiss

IPC: H03B5/12

CPC classification number: H03B5/1228 ,  H03B5/1215 ,  H03B5/1253 ,  H03B5/1265 ,  H03B2201/0208 ,  H03B2201/025

Abstract: A system and apparatus for varactor bank switching for a voltage controlled oscillator, is disclosed. Varactor bank switching involves partitioning a varactor bank switch into two anti-parallel branches, wherein each branch comprises a pass-gate circuit that is series-connected to a fixed varactor or capacitor; and maintaining an output common mode voltage of an actual oscillator signal at the varactor-side terminal of each pass-gate circuit, such that a threshold voltage of the switch transistor in the pass-gate circuit is not exceeded and the switch remains in an off-state.

Abstract translation: 公开了一种用于压控振荡器的变容二极管开关的系统和装置。 变容二极管开关包括将变容二极管开关分成两个反并联支路，其中每个支路包括串联连接到固定变容二极管或电容器的通栅电路; 并且在每个通过栅极电路的变容二极管端保持实际振荡器信号的输出共模电压，使得不超过通路栅极电路中的开关晶体管的阈值电压，并且开关保持断开 -州。

公开(公告)号：US20090140819A1

公开(公告)日：2009-06-04

申请号：US11947919

申请日：2007-11-30

Applicant: Aaron S. Rogers ,  Daniel W. Bailey ,  Roger D. Pannell

Inventor： Aaron S. Rogers ,  Daniel W. Bailey ,  Roger D. Pannell

IPC: H03B1/00

CPC classification number: H03B5/32 ,  H03B2201/0208 ,  H03B2201/0266 ,  H03J2200/10

Abstract: To determine performance degradation at functional module in a normal power state due to a power control device, voltages are applied to oscillators at a power diagnostic module. A first voltage is a supply voltage for the data processing device, and a second voltage is a supply voltage applied at a functional module of the data processing device. Counters are adjusted based on the oscillators to determine the oscillators' respective frequencies. In addition, the power diagnostic module can include a timer to measure the length of time that the functional module is in a low-power state, and an analog to digital converter to measure the voltage applied to the functional module during transitions to and from the low-power state.

Abstract translation: 为了确定由于功率控制装置在正常功率状态下的功能模块的性能下降，电压被施加到功率诊断模块的振荡器。 第一电压是数据处理装置的电源电压，第二电压是在数据处理装置的功能模块上施加的电源电压。 基于振荡器调整计数器以确定振荡器的相应频率。 此外，功率诊断模块可以包括用于测量功能模块处于低功率状态的时间长度的定时器，以及模数转换器，用于测量在向和/或不同的过渡期间施加到功能模块的电压 低功率状态

公开(公告)号：US20090128244A1

公开(公告)日：2009-05-21

申请号：US12048558

申请日：2008-03-14

Applicant: Ping-Yuan Deng ,  Jean-Fu Kiang

Inventor： Ping-Yuan Deng ,  Jean-Fu Kiang

IPC: H03B5/00 ,  H03B5/08

CPC classification number: H03B5/1215 ,  H03B5/1228 ,  H03B5/1243 ,  H03B2201/0208

Abstract: A FET transistor voltage-controlled oscillator is provided that includes a crossed-coupled inductor capacitor tank (LC-Tank) transistor voltage-controlled circuit having a first transistor and a second transistor, as well as a transistor frequency multiplying circuit having a third transistor and a fourth transistor. In the design, the gate of the first transistor is connected to the drain of the second transistor, and the gate of the second transistor is connected to the drain of the first transistor. Then, the source of the third transistor is connected to the source of the first transistor, and the source of the fourth transistor is connected to the source of the second transistor. Last, the gate of the third transistor is connected to the gate of the fourth transistor, and the drain of the third transistor is connected to the drain of the fourth transistor. Therefore, the parasitic capacitance present in the first transistor and the parasitic capacitance present in the second transistor generate an effect similar to two capacitors connected in series, via the transistor frequency multiplying circuit. The effect reduces the total capacitance of the voltage-controlled oscillator, to increase the working frequency of the voltage-controlled circuit and allow a circuit having the voltage-controlled circuit to operate at a high frequency.

Abstract translation: 提供了一种FET晶体管压控振荡器，其包括具有第一晶体管和第二晶体管的交叉耦合电感器电容器箱（LC-Tank）晶体管压控电路，以及具有第三晶体管的晶体管倍频电路， 第四晶体管。 在设计中，第一晶体管的栅极连接到第二晶体管的漏极，第二晶体管的栅极连接到第一晶体管的漏极。 然后，第三晶体管的源极连接到第一晶体管的源极，第四晶体管的源极连接到第二晶体管的源极。 最后，第三晶体管的栅极连接到第四晶体管的栅极，第三晶体管的漏极连接到第四晶体管的漏极。 因此，存在于第一晶体管中的寄生电容和第二晶体管中存在的寄生电容经由晶体管倍频电路产生类似于串联连接的两个电容器的效果。 该效果降低了压控振荡器的总电容，以增加压控电路的工作频率，并允许具有压控电路的电路以高频工作。

公开(公告)号：US07536165B2

公开(公告)日：2009-05-19

申请号：US10202035

申请日：2002-07-24

Applicant: William Redman-White

Inventor： William Redman-White

IPC: H04B1/24

CPC classification number: H03D7/1425 ,  H03B2201/0208 ,  H03D7/1433 ,  H03D7/1458 ,  H03D2200/0043 ,  H03D2200/0047 ,  H03D2200/009 ,  H03K17/14 ,  H03K17/603 ,  H03K17/6264

Abstract: A direct conversion receiver includes a detector that provides a measure of bias offset that is caused by component mismatches in the direct conversion mixer, and a corrective network that reduces the bias offset based on this measure. The direct conversion mixer demodulates a radio-frequency (RF) input signal via mixing with a local-oscillator (LO) signal to provide a differential baseband output signal. A differential peak detector compares the peak signal value at each side of the mixer's differential output, and a differential integrator averages the difference between these peak signal values to provide the measure of bias offset. The corrective network adds a correction offset to each of the local oscillator local oscillator paths on each of the switching pairs that provide the differential output, but opposite to the local oscillator connections. By applying the correction offset to the opposing transistor in each pair, the difference in switching time between the pairs is reduced, and, correspondingly, the differential-mode leakage from the local oscillator to the RF input stage is reduced.

Abstract translation: 直接转换接收机包括检测器，该检测器提供由直接转换混频器中的部件不匹配引起的偏移偏移的度量，以及基于该测量减少偏移偏移的校正网络。 直接转换混频器通过与本地振荡器（LO）信号混频解调射频（RF）输入信号，以提供差分基带输出信号。 差分峰值检测器比较混频器差分输出的每一侧的峰值信号值，差分积分器对这些峰值信号值之间的差异进行平均，以提供偏置偏移的测量。 校正网络为提供差分输出但与本地振荡器连接相反的每个开关对上的每个本地振荡器本地振荡器路径增加了校正偏移。 通过将校正偏移应用于每对中的对置晶体管，减小了对之间的切换时间差，相应地减小了从本地振荡器到RF输入级的差模泄漏。