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公开(公告)号：US20070102092A1
公开(公告)日：2007-05-10
申请号：US11272590
申请日：2005-11-10
Applicant: John Dangler , Matthew Doyle
Inventor： John Dangler , Matthew Doyle
CPC classification number: B32B37/12 , B32B2457/08 , H05K1/0393 , H05K3/386 , H05K3/4611 , H05K3/4635 , H05K2201/0195 , H05K2201/09318 , H05K2201/09327 , H05K2201/09881
Abstract: A method for manufacturing multilayer flexible circuits is disclosed. The cross-sectional area of an unoccupied signal layer volume is initially determined. The unoccupied signal layer includes multiple conductive elements, and the unoccupied signal layer volume is formed between two of the conductive elements. Next, the thickness of an adhesive layer for filling the unoccupied signal layer volume is determined. Finally, the thickness of the adhesive layer is adjusted such that the adhesive layer only fills the unoccupied signal layer volume while the two conductive elements come in direct contact with a dielectric layer without any adhesive in between.
Abstract translation: 公开了一种制造多层柔性电路的方法。 初始确定未占用信号层体积的横截面面积。 未占用的信号层包括多个导电元件，并且在两个导电元件之间形成未占用的信号层体积。 接下来，确定用于填充未占用信号层体积的粘合剂层的厚度。 最后，调节粘合剂层的厚度，使得粘合剂层仅填充未占用的信号层体积，同时两个导电元件与电介质层直接接触，而两者之间没有任何粘合剂。
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公开(公告)号：US20070095456A1
公开(公告)日：2007-05-03
申请号：US11611552
申请日：2006-12-15
Applicant: Shingo OKUYAMA , Hiroyoshi TAKASHIMA , Akira HASHIMOTO , Shinichi KOKAWA
Inventor： Shingo OKUYAMA , Hiroyoshi TAKASHIMA , Akira HASHIMOTO , Shinichi KOKAWA
IPC: C03B29/00
CPC classification number: B32B18/00 , B32B38/145 , C04B35/468 , C04B2237/346 , C04B2237/50 , C04B2237/68 , C04B2237/704 , H01G4/12 , H01G4/30 , H01G4/308 , H01G4/33 , H05K1/0306 , H05K3/12 , H05K3/4611 , H05K3/4629 , H05K2201/09881 , H05K2203/0113 , Y10T29/435
Abstract: A method for manufacturing a multilayer ceramic electronic element includes the steps of forming ceramic green sheets having superior surface smoothness and small variations in thickness at a high speed, in which defects such as pinholes are prevented from occurring, and providing internal electrodes and step-smoothing ceramic paste on the ceramic green sheets with high accuracy. The method includes the steps of applying ceramic slurry to a base film by a die coater followed by drying performed in a drying furnace for forming the ceramic green sheets, and performing gravure printing of conductive paste and ceramic paste onto the ceramic green sheets by using a first and a second gravure printing apparatus, respectively. Accordingly, the internal electrodes are formed, and the step-smoothing ceramic paste is provided in regions other than those in which the internal electrodes are formed.
Abstract translation: 一种制造多层陶瓷电子元件的方法包括以下步骤：形成具有优异表面平滑度和高速度变化小的陶瓷生片，其中防止诸如针孔的缺陷发生，并且提供内部电极和阶梯平滑 陶瓷贴纸陶瓷生坯片高精度。 该方法包括以下步骤：通过模涂机将陶瓷浆料施加到基膜上，然后在用于形成陶瓷生片的干燥炉中进行干燥，并且通过使用陶瓷生片将导电浆料和陶瓷浆料进行凹版印刷 第一和第二凹版印刷设备。 因此，形成内部电极，并且在除了形成内部电极的区域之外的区域中设置阶梯平滑陶瓷膏。
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123.发明申请公开(公告)号：US20070094874A1
公开(公告)日：2007-05-03
申请号：US11642570
申请日：2006-12-20
Applicant: Belgacem Haba , Masud Beroz , David Tuckerman , Giles Humpston , Richard Crisp
Inventor： Belgacem Haba , Masud Beroz , David Tuckerman , Giles Humpston , Richard Crisp
IPC: H05K1/11
CPC classification number: H01L23/49838 , H01L23/49827 , H01L2924/0002 , H05K1/115 , H05K3/041 , H05K3/06 , H05K3/202 , H05K3/4038 , H05K2201/09609 , H05K2201/097 , H05K2201/09827 , H05K2201/09881 , H05K2203/0733 , Y10T29/49117 , Y10T29/49126 , Y10T29/49128 , Y10T29/49147 , Y10T29/49149 , Y10T29/49165 , H01L2924/00
Abstract: Provided are connection structures for a microelectronic device and methods for forming the structure. A substrate is included having opposing surfaces and a plurality of holes extending through the surfaces. Also included is a plurality of electrically conductive posts. Each post extends from a base to a tip located within a corresponding hole of the substrate. An additional substrate may be provided such that the base of each post is located on a surface thereof. Additional electrically conductive posts may be provided having tips in corresponding holes of the additional substrate. Optionally, a dielectric material may be placed between the substrate and the posts.
Abstract translation: 提供了用于微电子器件的连接结构和用于形成结构的方法。 包括具有相对表面的基板和延伸穿过该表面的多个孔。 还包括多个导电柱。 每个柱从基部延伸到位于基板的相应孔内的尖端。 可以提供另外的基底，使得每个柱的基部位于其表面上。 可以提供额外的导电柱，其具有在附加衬底的相应孔中的尖端。 可选地，介电材料可以放置在基板和柱之间。
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公开(公告)号：US07208341B2
公开(公告)日：2007-04-24
申请号：US10855557
申请日：2004-05-28
Applicant: Kwang-Tae Lee , Sung-Gue Lee , Sang-Hyuck Nam , Sung-Ho Youn , Young-Kyu Lee
Inventor： Kwang-Tae Lee , Sung-Gue Lee , Sang-Hyuck Nam , Sung-Ho Youn , Young-Kyu Lee
IPC: H01L21/48 , H01L21/4763
CPC classification number: H05K3/28 , H05K3/243 , H05K2201/0959 , H05K2201/09881 , H05K2203/025 , H05K2203/0577 , Y10T29/49155
Abstract: A method for manufacturing a printed circuit board includes: forming inner circuit patterns in an insulating material in multi-layers, forming a plurality of through holes at certain portions of the insulating material, and forming an outer circuit pattern which is electrically connected to the inner circuit pattern, at an inner circumferential surface of the through hole and the surface of the insulating material, and a terminal portion; forming a first photo solder resist layer at an entire surface of the insulating material and an entire surface of the outer circuit pattern, and exposing the terminal portion by removing a specific portion of the first photo solder resist layer; abrading the surface of the first photo solder resist layer; printing a second photo solder resist layer at the surface of the first photo solder resist layer, and exposing the terminal portion to the outside by removing a specific portion of the second photo solder resist layer; and forming a pad portion by plating the surface of the exposed terminal portion with gold, and electrically connecting the pad portion and the terminal portion.
Abstract translation: 印刷电路板的制造方法包括：在多层绝缘材料中形成内部电路图案，在绝缘材料的某些部分形成多个通孔，并形成外部电路图形，该外部电路图形与内部 在通孔的内周面和绝缘材料的表面上形成电路图形，以及端子部分; 在所述绝缘材料的整个表面和所述外部电路图案的整个表面上形成第一光阻焊层，并且通过去除所述第一光阻焊层的特定部分来暴露所述端子部分; 研磨第一光阻焊层的表面; 在第一光阻焊层的表面上印刷第二光阻焊层，并通过去除第二光阻焊层的特定部分将端子部分暴露于外部; 以及通过用暴露的端子部分的表面镀金形成焊盘部分，并且电连接焊盘部分和端子部分。
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公开(公告)号：US07180007B2
公开(公告)日：2007-02-20
申请号：US10860653
申请日：2004-06-04
Applicant: Kazuhiro Nishikawa , Norihito Tsukahara , Masayuki Okano
Inventor： Kazuhiro Nishikawa , Norihito Tsukahara , Masayuki Okano
IPC: H05K1/09
CPC classification number: H05K3/321 , H01L2224/16225 , H01L2224/29012 , H01L2224/32225 , H01L2224/73103 , H01L2224/73204 , H01L2224/83192 , H01L2924/01322 , H05K1/095 , H05K3/305 , H05K3/4664 , H05K2201/09881 , H05K2201/10636 , Y02P70/611 , Y02P70/613 , H01L2924/00 , H01L2924/00012
Abstract: It comprises circuit board 10 with circuit pattern 2 formed by conductive resin paste on resin substrate 1, surface-mounted type electronic components 30, 40 arranged with electrode terminals with respect to the connecting region of circuit pattern 2, connecting member 3 formed from conductive resin paste for connecting the connecting region to the electrode terminal, and insulating adhesive 6 for bonding the electronic components 30, 40 and circuit board 10, which is lower in curing temperature than conductive resin paste and disposed in a space between circuit board 10 and electronic components 30, 40 between connecting regions.
Abstract translation: 它包括具有由树脂基板1上的导电树脂膏形成的电路图案2的电路板10，相对于电路图案2的连接区域布置有电极端子的表面安装型电子部件30,4，由导电树脂形成的连接部件3 用于将连接区域连接到电极端子的粘合剂以及用于粘合固化温度低于导电树脂浆料并且设置在电路板10和电子部件之间的空间中的电子部件30,40和电路板10的绝缘粘合剂6 30，40连接区域之间。
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Patent Agency Ranking
126.发明申请Printed circuit board including embedded capacitor and method of fabricating same 审中-公开包括嵌入式电容器的印刷电路板及其制造方法公开(公告)号：US20060115770A1
公开(公告)日：2006-06-01
申请号：US11058998
申请日：2005-02-15
IPC: G03C5/00
CPC classification number: H05K1/162 , H05K3/0023 , H05K3/0082 , H05K3/064 , H05K3/108 , H05K3/181 , H05K3/184 , H05K3/4644 , H05K2201/0355 , H05K2201/09509 , H05K2201/09881 , H05K2203/0551
Abstract: Disclosed is a PCB including an embedded capacitor, in which a dielectric layer and an upper electrode layer are formed after a lower electrode layer of the embedded capacitor is formed, thereby providing a microcircuit pattern on a circuit layer having a lower electrode layer formed thereon, and a method of fabricating the same.
Abstract translation: 公开了一种在嵌入式电容器的下电极层形成之后形成介质层和上电极层的嵌入式电容器的PCB，从而在其上形成有下电极层的电路层上提供微电路图案， 及其制造方法。
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公开(公告)号：US20060113658A1
公开(公告)日：2006-06-01
申请号：US11128768
申请日：2005-05-12
Applicant: Tzyy-Jang Tseng , Chih Chang , Cheng Yu , Chung Ho
Inventor： Tzyy-Jang Tseng , Chih Chang , Cheng Yu , Chung Ho
IPC: H01L23/04
CPC classification number: H05K3/4602 , H01L21/4857 , H01L23/142 , H01L23/3677 , H01L23/49822 , H01L2924/0002 , H05K1/0206 , H05K1/0265 , H05K3/06 , H05K3/107 , H05K2201/09881 , H05K2203/0369 , H05K2203/1476 , H01L2924/00
Abstract: A substrate including a first patterned metallic layer, a second patterned metallic layer and an insulator is provided. One side of the first patterned metallic layer is connected to a corresponding side of the second patterned metallic layer. The first patterned metallic layer and the second patterned metallic layer are formed as a whole. The insulator fills the gaps in the first patterned metallic layer and the gaps in the second patterned metallic layer.
Abstract translation: 提供了包括第一图案化金属层，第二图案化金属层和绝缘体的基板。 第一图案化金属层的一侧连接到第二图案化金属层的相应侧。 第一图案化金属层和第二图案化金属层整体形成。 绝缘体填充第一图案化金属层的间隙和第二图案化金属层中的间隙。
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公开(公告)号：US20060042832A1
公开(公告)日：2006-03-02
申请号：US10927931
申请日：2004-08-27
Applicant: Kiyoshi Sato , Kazunori Kitamura
Inventor： Kiyoshi Sato , Kazunori Kitamura
CPC classification number: H05K3/4614 , H05K3/205 , H05K3/328 , H05K3/423 , H05K2201/09881 , H05K2201/10378
Abstract: A multilayer circuit board comprises a conductor wiring layer, and an insulation layer, wherein the conductor wiring layer and the insulation layer are laminated alternately, wherein the conductor wiring layer is electrically connected by a via through the insulation layer, wherein the via is filled with a conductor material, and wherein the conductor material is junctured to the conductor wiring layer with an alloy.
Abstract translation: 多层电路板包括导体布线层和绝缘层，其中导体布线层和绝缘层交替层叠，其中导体布线层通过绝缘层通孔电连接，其中通孔填充有 导体材料，并且其中导体材料用合金接合到导体布线层。
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公开(公告)号：US20050121225A1
公开(公告)日：2005-06-09
申请号：US10876476
申请日：2004-06-28
Applicant: Shih-Ping Hsu
Inventor： Shih-Ping Hsu
CPC classification number: H05K3/462 , H05K3/28 , H05K3/381 , H05K2201/09509 , H05K2201/09536 , H05K2201/09563 , H05K2201/0959 , H05K2201/096 , H05K2201/09881 , H05K2203/095 , Y10T29/49126
Abstract: A multi-layer circuit board and a method for fabricating the same are proposed. A plurality of circuit board units are prepared and formed with patterned circuit layers thereon. At least one insulating layer is formed on each of the circuit board units. The insulating layer is patterned to form a plurality of opening or is thinned to expose contact pads of the circuit layers on the circuit board units. The circuit board units undergo surface activation and laminating processes in vacuum to form a multi-layer circuit board, wherein the circuit board units are laminated and electrically connected together by the exposed contact pads. This method reduces the time and cost for fabrication.
Abstract translation: 提出了一种多层电路板及其制造方法。 制备多个电路板单元并在其上形成图案化的电路层。 在每个电路板单元上形成至少一个绝缘层。 图案化绝缘层以形成多个开口或被稀释以暴露电路板单元上的电路层的接触焊盘。 电路板单元在真空中进行表面活化和层压工艺以形成多层电路板，其中电路板单元通过暴露的接触垫层压并电连接在一起。 这种方法减少了制造的时间和成本。
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公开(公告)号：US20050016661A1
公开(公告)日：2005-01-27
申请号：US10925447
申请日：2004-08-25
Applicant: Shingo Okuyama , Hiroyoshi Takashima , Akira Hashimoto , Shinichi Kokawa
Inventor： Shingo Okuyama , Hiroyoshi Takashima , Akira Hashimoto , Shinichi Kokawa
IPC: C04B35/468 , H01G4/12 , H01G4/30 , B05D5/12
CPC classification number: B32B18/00 , B32B38/145 , C04B35/468 , C04B2237/346 , C04B2237/50 , C04B2237/68 , C04B2237/704 , H01G4/12 , H01G4/30 , H01G4/308 , H01G4/33 , H05K1/0306 , H05K3/12 , H05K3/4611 , H05K3/4629 , H05K2201/09881 , H05K2203/0113 , Y10T29/435
Abstract: A method for manufacturing a multilayer ceramic electronic element includes the steps of forming ceramic green sheets having superior surface smoothness and small variations in thickness at a high speed, in which defects such as pinholes are prevented from occurring, and providing internal electrodes and step-smoothing ceramic paste on the ceramic green sheets with high accuracy. The method includes the steps of applying ceramic slurry to a base film by a die coater followed by drying performed in a drying furnace for forming the ceramic green sheets, and performing gravure printing of conductive paste and ceramic paste onto the ceramic green sheets by using a first and a second gravure printing apparatus, respectively. Accordingly, the internal electrodes are formed, and the step-smoothing ceramic paste is provided in regions other than those in which the internal electrodes are formed.
Abstract translation: 一种制造多层陶瓷电子元件的方法包括以下步骤：形成具有优异表面平滑度和高速度变化小的陶瓷生片，其中防止诸如针孔的缺陷发生，并且提供内部电极和阶梯平滑 陶瓷贴纸陶瓷生坯片高精度。 该方法包括以下步骤：通过模涂机将陶瓷浆料施加到基膜上，然后在用于形成陶瓷生片的干燥炉中进行干燥，并且通过使用陶瓷生片将导电浆料和陶瓷浆料进行凹版印刷 第一和第二凹版印刷设备。 因此，形成内部电极，并且在除了形成内部电极的区域之外的区域中设置阶梯平滑陶瓷膏。
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