Abstract:
Disclosed is a printed circuit board. The printed circuit board includes an insulating layer, a copper foil formed on the insulating layer and formed therein with a groove to expose a portion of a top surface of the insulating layer, and a thermal conductive layer filled in the groove.
Abstract:
To provide a wiring board in which wiring conductors are securely protected by a precise and rigid dam portion formed on an outermost layer of a laminate and that is excellent in connection reliability with a semiconductor chip. A laminate that configures this wiring board includes multiple connection terminal portions and wiring conductors as a conductor layer of the outermost layer. The wiring conductors are arranged at predetermined positions, passing through between multiple connection terminal portions for flip-chip mounting a semiconductor chip. A resin insulating layer of the outermost layer of the laminate has a dam portion and a reinforcement portion. The dam portion covers the wiring conductors. The reinforcement portion is formed, between the wiring conductor and the connection terminal portion that is adjacent to the wiring conductor, lower than a height of the dam portion. The reinforcement portion is concatenated with a side surface of the dam portion.
Abstract:
A multi-layer resin substrate is a multi-layer resin substrate integrated by stacking and thermocompression bonding a plurality of resin layers each composed of a thermoplastic resin as a main material and having a main surface. The plurality of resin layers include a resin layer having a pattern member arranged on the main surface. A surface of at least some resin layers of the plurality of resin layers has a paint layer, which is obtained by applying a thermoplastic resin paint to a region corresponding to a region insufficient in thickness as a stack as a whole during a process for stacking and thermocompression bonding the plurality of resin layers. The pattern member is provided, for example, by a conductor pattern.
Abstract:
A method for producing a ceramic multilayer circuit system, and a corresponding multilayer circuit system are provided. An embodiment of the method includes sequential deposition of a plurality of circuit layers of the multilayer circuit system on a substrate using a powder spray method; pressing of the deposited plurality of circuit layers; and thermal sintering of the pressed plurality of circuit layers. The individual circuit layers have electrically conductive areas made of at least one conductive material and electrically insulating areas made of at least one ceramic material.
Abstract:
An electrode connected to a TH pad requiring electric conduction is formed on a bonded surface of a first multilayer substrate having piercing TH to form a solder bump on the electrode. An electrode connected to the TH pad is formed on a bonded surface of a second multilayer substrate to be bonded having a piercing TH at a position opposite the electrode formed on the first multilayer substrate to form a solder bump on the electrode. A three-layered sheet is formed by applying an adhesive as a resin material that is not completely cured to both surfaces of a core material as the cured resin, and has holes at positions corresponding to the TH and the solder bump, respectively. The first and the second multilayer substrates are then laminated having the bonded surfaces facing each other while having the three-layered sheet positioned and interposed therebetween, and batch thermocompression bonded.
Abstract:
A method of manufacturing a multi-layer printed circuit board includes the following steps (A) and (B). (A) Providing penetrating openings which are formed into through holes and each of which has a small diameter for a core substrate, and (B) providing penetrating openings which are formed into through holes each having a large diameter for the core substrate.
Abstract:
In the present invention, a ceramic substrate composite comprising, on a ceramic substrate, a conductor pattern composite and an insulating layer is provided. The ceramic substrate composite of the present invention is characterized in that the conductor pattern composite and the insulating layer are provided on the ceramic substrate with each other so that the insulating layer overlaps a part of the conductor pattern composite; and wherein the conductor pattern composite is composed of a conductor portion and an insulating portion that exists locally in the conductor portion, the insulating portion being an insulating material that constitutes the insulating layer.
Abstract:
Embodiments of the present wiring substrate include a stacked body including one or more insulation layers and one or more conductive layers, wherein the wiring substrate has a plurality of connection terminals formed on the stacked body, each connection terminal has a top surface whose area is smaller than that of each of opposite side surfaces thereof, and a filling member provided in a filling manner between the connection terminals. The top surface of each connection terminal has an area larger than that of a portion of each side surfaces portion exposed from the filling member, and a bonding layer containing a solder is formed on the top surface.
Abstract:
Systems and methods for simultaneously partitioning a plurality of via structures into electrically isolated portions by using plating resist within a PCB stackup are disclosed. Such via structures are made by selectively depositing plating resist in one or more locations in a sub-composite structure. A plurality of sub-composite structures with plating resist deposited in varying locations are laminated to form a PCB stackup of a desired PCB design. Through-holes are drilled through the PCB stackup through conductive layers, dielectric layers and through the plating resist. Thus, the PCB panel has multiple through-holes that can then be plated simultaneously by placing the PCB panel into a seed bath, followed by immersion in an electroless copper bath. Such partitioned vias increase wiring density and limit stub formation in via structures. Such partitioned vias allow a plurality of electrical signals to traverse each electrically isolated portion without interference from each other.
Abstract:
The present invention provides an electrostatic discharge protector capable of protecting electronic circuit boards having various designs from electrostatic discharge freely, simply and easily. The electrostatic discharge protector of the present invention comprises at least three conductive members containing one pair of electrodes and the conductive members other than the electrodes, the conductive members are each disposed in such a way that the gap between one conductive member and the other conductive member has a width of 0.1 to 10 μm, an insulating member is disposed and embedded in at least one of gaps having a width of 0.1 to 10 μm which are adjacent to each conductive member and one electrode is connected to the other electrode paired with the one electrode through the insulating member and the conductive members other than electrodes.