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    Optimization identification
    131.
    发明授权
    Optimization identification 有权

    公开(公告)号：US09934004B1

    公开(公告)日：2018-04-03

    申请号：US14230191

    申请日：2014-03-31

    Applicant: THE MATHWORKS, INC.

    Inventor： Aravind Pillarisetti ,  Peter S. Szpak ,  Jesung Kim ,  Xiaocang Lin ,  Pieter J. Mosterman

    IPC: G06F9/45 ,  G06F9/44 ,  G06F9/455 ,  G06F11/36

    CPC classification number: G06F8/30 ,  G06F8/35 ,  G06F8/41 ,  G06F9/45516 ,  G06F11/362 ,  G06F11/3664 ,  G06F11/3676

    Abstract: A computer readable medium including executable instructions that when executed perform a method for validating an optimization in generated code using an executable constraints document is provided. The medium can include instructions for relating an assumption to the optimization during code generation. The medium can include instructions for generating the executable constraints document during the code generation, the executable constraints document including information about the relating; and the medium can include instructions for executing the constraints document when the validating is performed, the validating including performing an operation based on a validation result produced by the validating, where the operation includes displaying the validation result to a user, storing the validation result, sending the validation result to a destination, or modifying the generated code.

    Utilizing clock rate pipelining to generate code for multi-rate systems
    132.
    发明授权
    Utilizing clock rate pipelining to generate code for multi-rate systems 有权

    公开(公告)号：US09846571B1

    公开(公告)日：2017-12-19

    申请号：US14596443

    申请日：2015-01-14

    Applicant: The MathWorks, Inc.

    Inventor： Girish Venkataramani ,  Yongfeng Gu ,  Wang Chen

    IPC: G06F9/44 ,  G06F11/36

    CPC classification number: G06F8/35 ,  G06F11/3672

    Abstract: A device generates a model associated with a multi-rate system. The multi-rate system includes a system associated with a clock rate and a sample rate, and the clock rate is greater than the sample rate. The device identifies the clock rate of the multi-rate system based on the model, and identifies a portion, of the model, associated with the sample rate. The device applies clock rate pipelining to adjust the sample rate associated with the portion of the model so that the sample rate substantially equals the clock rate, and generates code associated with the model and the applied clock rate pipelining.

    Systems and methods for hardware resource sharing
    135.
    发明授权
    Systems and methods for hardware resource sharing 有权

    公开(公告)号：US09710237B1

    公开(公告)日：2017-07-18

    申请号：US15194120

    申请日：2016-06-27

    Applicant: The MathWorks, Inc.

    Inventor： Girish Venkataramani

    IPC: G06F9/44

    CPC classification number: G06F8/34 ,  G06F8/443

    Abstract: A system and method optimizes hardware description generated from a graphical program or model having oversampling constraints automatically. The system may include a streaming optimizer, a resource sharing optimizer, a delay balancing engine, and a global scheduler. The streaming optimizer may transform vector data paths to scalar or smaller-sized vector data paths. The resource sharing optimizer may replace multiple, functionally equivalent blocks with a single shared block. The delay balancing may insert one or more elements to correct for data path misalignment. The global scheduler may place portions of the program or model into conditional execution sections and create control logic that controls the model sample times or steps that the portions are enabled. A validation model, a report, or hardware description code that utilizes fewer hardware resources may be generated from a modified version of the model that is created.

    Renaming instances of an entity in a coding environment
    140.
    发明授权
    Renaming instances of an entity in a coding environment 有权
    在编码环境中重命名实体的实例

    公开(公告)号：US09588744B2

    公开(公告)日：2017-03-07

    申请号：US14452008

    申请日：2014-08-05

    Applicant: The MathWorks, Inc.

    Inventor： Joseph R. Bienkowski ,  John E. Booker ,  Srinath Avadhanula ,  Vijay Raghavan

    IPC: G06F9/44 ,  G06F17/24

    CPC classification number: G06F8/34 ,  G06F8/33 ,  G06F8/70 ,  G06F8/72 ,  G06F17/24

    Abstract: Exemplary embodiments provide computer-implemented methods, computer-readable media, and systems for changing the identifier associated with an entity, such as a variable or function, in a portion of code. During editing, a reference may be maintained that identifies the location of each instance of the entity in the code. When the identifier associated with one instance of the entity is changed, the change in the identifier may be propagated throughout the code to change each instance of the identifier in the code. The identifier may be changed without interrupting the workflow of the user and without the need to change to a separate refactoring mode. In some embodiments, a syntactical analysis may be performed and some or all instances of the identifier may be changed based on one or more rules.

    Abstract translation: 示例性实施例提供计算机实现的方法，计算机可读介质和用于在代码的一部分中改变与诸如变量或功能的实体相关联的标识符的系统。 在编辑期间，可以保留标识代码中实体的每个实例的位置的引用。 当与实体的一个实例相关联的标识符改变时，可以在整个代码中传播标识符的改变以改​​变代码中的标识符的每个实例。 可以改变标识符而不中断用户的工作流程，而不需要改变为单独的重构模式。 在一些实施例中，可以执行语法分析，并且可以基于一个或多个规则来改变标识符的一些或所有实例。

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