Abstract:
A system comprises a first master element; and at least one shared communication element arranged to operably couple the first master element to at least one slave element. The system further comprises at least one validation element located on at least one further validation path located between the first master element and the at least one slave element, wherein the at least one validation element is arranged to validate at least one of: at least one access request by the first master element; and a response to an access request from the at least one slave element.
Abstract:
Provided are techniques for configuring a primary shared Ethernet adapter (SEA) and a backup SEA into a failover (F/O) protocol; providing a user interface (UI) for enabling a user to request a SEA load sharing protocol; in response to a user request for a SEA load sharing protocol, verifying that criteria for load sharing are satisfied; setting, by the UI a load sharing mode, comprising: requesting, by the backup SEA to the primary SEA, implementation of the SEA load sharing protocol; responsive to the requesting by the backup SEA, the primary SEA transmit an acknowledgment to the backup SEA and transitions into a sharing state; and responsive to the acknowledgment from the primary SEA, the backup SEA transitions to the sharing state.
Abstract:
Network repeaters which each implement a redundant switching function previously grasp connection states of ports of a network system by using an inquiry frame and an exchange frame. At the time when a line is broken, when actively confirming a state of a port connected to a port in which a line is broken via a downstream device, the network repeaters each grasp that which portion of the line is broken and determine whether a switchover is required. Through the process, the network repeaters each prevent a useless switchover such as switching-back immediately after the switchover, and at the same time since a mechanism of waiting for a given length of times is not required, they each perform a fast switchover.
Abstract:
A circuit arrangement and method utilize existing redundant execution pipelines in a processing unit to execute multiple instances of stability critical instructions in parallel so that the results of the multiple instances of the instructions can be compared for the purpose of detecting errors. For other types of instructions for which fault tolerant or stability critical execution is not required or desired, the redundant execution pipelines are utilized in a more conventional manner, enabling multiple non-stability critical instructions to be concurrently issued to and executed by the redundant execution pipelines. As such, for non-stability critical program code, the performance benefits of having multiple redundant execution units are preserved, yet in the instances where fault tolerant or stability critical execution is desired for certain program code, the redundant execution units may be repurposed to provide greater assurances as to the fault-free execution of such instructions.
Abstract:
Provided are techniques for configuring a primary shared Ethernet adapter (SEA) and a backup SEA into a failover (F/O) protocol; providing a user interface (UI) for enabling a user to request a SEA load sharing protocol; in response to a user request for a SEA load sharing protocol, verifying that criteria for load sharing are satisfied; setting, by the UI a load sharing mode, comprising: requesting, by the backup SEA to the primary SEA, implementation of the SEA load sharing protocol; responsive to the requesting by the backup SEA, the primary SEA transmit an acknowledgment to the backup SEA and transitions into a sharing state; and responsive to the acknowledgment from the primary SEA, the backup SEA transitions to the sharing state.
Abstract:
To facilitate dynamic lockstep support, replacement states and/or logic used to select particular cache lines for replacement with new allocations in accord with replacement algorithms or strategies may be enhanced to provide generally independent replacement contexts for use in respective lockstep and performance modes. In some cases, replacement logic that may be otherwise conventional in its selection of cache lines for new allocations in accord with a first-in, first-out (FIFO), round-robin, random, least recently used (LRU), pseudo LRU, or other replacement algorithm/strategy is at least partially replicated to provide lockstep and performance instances that respectively cover lockstep and performance partitions of a cache. In some cases, a unified instance of replacement logic may be reinitialized with appropriate states at (or coincident with) transitions between performance and lockstep modes of operation.
Abstract:
A system and method are disclosed for maintaining a plurality of data storages coherent with one another for redundancy purposes. The system includes a first data storage system and a second data storage system. The first data storage system is coupled to a first transaction processor for handling input and output transactions, and is coupled to a wide area network. The second data storage system is coupled to a second transaction processor for handling input and output transactions, and is coupled to the wide area network. The first transaction processor permits a first data write transaction to occur with respect to data within the first data storage system, and the second transaction processor permits a second data write transaction to occur with respect to data within the second data storage system. The first transaction processor permits the second data write transaction to occur with respect to data within the first data storage system only upon data consistency between the first and second data storage systems being validated. The second transaction processor permits the first data write transaction to occur with respect to data within the second data storage system only upon data consistency between the first and second data storage systems being validated.
Abstract:
Processor operating methods and integrated circuits are described. According to one embodiment, an integrated circuit includes a processor configured to execute a first application and to redundantly execute a second application while executing the first application, the first application being different from the second application. According to another embodiment, a processor operating method includes receiving a request to execute an application using a processor having a plurality of processor cores. The method also includes, in response to the receiving, determining whether the application should be executed redundantly or non-redundantly, non-redundantly executing the application using one processor core of the plurality if the determining comprises determining that the application should be executed non-redundantly, and redundantly executing the application using two or more processor cores of the plurality if the determining comprises determining that the application should be executed redundantly.
Abstract:
A method and a device are provided for performing switching and data comparison in a computer system having at least two processing units which each process data at a specified clock pulse, in which a switchover arrangement is provided and switching takes place between at least two operating modes, and a comparison unit is provided. A first operating mode corresponding to a compare mode is provided, and a second operating mode corresponding to a performance mode is provided. A synchronization arrangement is provided which assigns to the specifiable data a clock pulse information as a function of a processing unit, and at least the comparison unit takes into consideration this clock pulse information in the corresponding data.
Abstract:
A system having multiple execution units and a method for its changeover are provided. The system having multiple execution units has at least two execution units, and may be changed over between a performance operating mode, in which the execution units execute different programs, and a comparison operating mode, in which the execution units execute the same program. The system has a scheduler, which is called by an execution unit to ascertain the next program to be executed. The remaining execution units are prompted to also call the scheduler if the program ascertained by the first called scheduler is to be executed in a comparison operating mode. A changeover unit changes over the system having multiple execution units from the performance operating mode into the comparison operating mode if the program to be executed ascertained by the last called scheduler is to be executed in the comparison operating mode, this ascertained program to be executed being executed as the program having the highest priority by all execution units after the changeover of the system into the comparison operating mode.