公开(公告)号：US20130258623A1

公开(公告)日：2013-10-03

申请号：US13433724

申请日：2012-03-29

Applicant: Zhao-Chong Zeng

Inventor： Zhao-Chong Zeng

IPC: H05K1/18 ,  H05K3/46 ,  H05K3/34

CPC classification number: H05K1/186 ,  H05K3/4602 ,  H05K2201/09645 ,  H05K2201/10015 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T29/49144

Abstract: A package structure having an embedded electronic element includes: a substrate having two opposite surfaces and a cavity penetrating the two opposite surfaces; at least a metal layer disposed on the sidewall of the cavity and extending to the surfaces of the substrate; an electronic element disposed in the cavity and having a plurality of electrode pads disposed on side surfaces thereof; and a solder material electrically connecting the electrode pads of the electronic element and the metal layer, thereby effectively alleviating the problems of alignment difficulty and high fabrication cost as encountered in the prior art.

Abstract translation: 具有嵌入式电子元件的封装结构包括：具有两个相对表面的基板和穿透两个相对表面的空腔; 至少一个金属层，其设置在所述腔的侧壁上并延伸到所述衬底的表面; 设置在所述空腔中并具有设置在其侧表面上的多个电极焊盘的电子元件; 以及电连接电子元件的电极焊盘和金属层的焊料，从而有效地减轻了现有技术中遇到的对准难度和制造成本高的问题。

公开(公告)号：US20130257470A1

公开(公告)日：2013-10-03

申请号：US13994074

申请日：2011-12-12

Applicant: Sung-Hak Park

Inventor： Sung-Hak Park

IPC: G01R31/26

CPC classification number: G01R31/2601 ,  G01R1/045 ,  G01R1/0483 ,  H01L2224/16225 ,  H01L2924/15174 ,  H01L2924/19105 ,  H05K1/0231 ,  H05K1/181 ,  H05K2201/10636 ,  Y02P70/611

Abstract: A semiconductor testing apparatus is provided wherein components that must be arranged most closely are arranged most closely to terminals of a test object. The present apparatus is semiconductor testing apparatus comprising a printed circuit board, and a test socket mounted on an upper surface of the printed circuit board and forming a signal connection path between a test object and the printing circuit board, wherein a chip shaped capacitor is mounted on the upper surface of the printed circuit board, an interference avoidance space avoiding contact with the capacitor is formed in the test socket, the interference avoidance space being formed at a location facing the location where the capacitor is mounted, and the capacitor and the test socket being non-contacted from each other by the interference avoidance space.

Abstract translation: 提供了一种半导体测试装置，其中必须布置得最紧密的部件最靠近测试对象的端子布置。 本装置是包括印刷电路板和安装在印刷电路板的上表面上并在测试对象和印刷电路板之间形成信号连接路径的测试插座的半导体测试装置，其中安装有芯片形电容器 在印刷电路板的上表面上，在测试插座中形成避免与电容器接触的干扰避免空间，避免干扰空间形成在面向安装电容器的位置的位置，电容器和测试 插座由干扰避免空间彼此不接触。

公开(公告)号：US08547677B2

公开(公告)日：2013-10-01

申请号：US13175918

申请日：2011-07-04

Applicant: William M. Anthony ,  David Anthony ,  Anthony Anthony

Inventor： William M. Anthony ,  David Anthony ,  Anthony Anthony

IPC: H02H9/00

CPC classification number: H01G4/35 ,  H01G4/005 ,  H01G4/232 ,  H01G4/30 ,  H05K1/0231 ,  H05K1/113 ,  H05K1/114 ,  H05K2201/0979 ,  H05K2201/10636 ,  Y02P70/611 ,  Y10T29/43 ,  Y10T29/49002

Abstract: The application discloses novel internal structures of energy conditioners, assemblies of external structures of energy conditioners and mounting structure, and novel circuits including energy conditioners having A, B, and G master electrodes.

Abstract translation: 该申请公开了能量调节器的新型内部结构，能量调节器的外部结构的组件和安装结构，以及包括具有A，B和G主电极的能量调节器的新颖的电路。

公开(公告)号：US08513536B2

公开(公告)日：2013-08-20

申请号：US12957962

申请日：2010-12-01

Applicant: Nau Negishi ,  Mikio Nakamura

Inventor： Nau Negishi ,  Mikio Nakamura

IPC: H05K1/16

CPC classification number: H01R9/0515 ,  H05K1/181 ,  H05K3/32 ,  H05K3/3442 ,  H05K2201/10287 ,  H05K2201/10636 ,  H05K2201/10962 ,  Y02P70/611 ,  Y10T29/49169

Abstract: An electronic circuit module is mounted on an electronic circuit board. The electronic circuit module includes an electronic component that has a first electrode and a second electrode that form a facing surface. The electronic circuit module also includes a coaxial cable with a core wire and a shielded wire being exposed in stages. The core wire and the shielded wire of the coaxial cable are directly connected to the first electrode and the second electrode that are exposed at a predetermined cable connecting surface of the electronic component.

Abstract translation: 电子电路模块安装在电子电路板上。 电子电路模块包括具有形成面对表面的第一电极和第二电极的电子部件。 电子电路模块还包括具有芯线的同轴电缆和屏蔽线分阶段地暴露。 同轴电缆的芯线和屏蔽线直接连接到暴露在电子部件的预定电缆连接表面处的第一电极和第二电极。

公开(公告)号：US20130170154A1

公开(公告)日：2013-07-04

申请号：US13734546

申请日：2013-01-04

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Doo Hwan LEE ,  Jong In RYU ,  Jin Won LEE ,  Moon Il KIM

IPC: H05K3/32 ,  H05K1/16

CPC classification number: H05K3/32 ,  H05K1/162 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/10636 ,  H05K2203/0191 ,  H05K2203/1469 ,  Y02P70/611 ,  Y10T29/4913

Abstract: Provided is a printed circuit board having an embedded capacitor including at least one sheet-shaped capacitor, an insulating material configured to cover the sheet-shaped capacitor, and a capacitor device mounted in the insulating material to be parallelly disposed at one side of the sheet-shaped capacitor, improving reliability of the substrate.

Abstract translation: 提供了一种印刷电路板，其具有包括至少一个片状电容器的嵌入式电容器，被配置为覆盖片状电容器的绝缘材料以及安装在绝缘材料中以平行布置在片材的一侧的电容器装置 形电容器，提高了基板的可靠性。

公开(公告)号：US08400776B2

公开(公告)日：2013-03-19

申请号：US11878923

申请日：2007-07-27

Applicant: Takahiro Sahara ,  Atsushi Kobayashi ,  Kiyoshi Takeuchi ,  Masahiko Igaue

Inventor： Takahiro Sahara ,  Atsushi Kobayashi ,  Kiyoshi Takeuchi ,  Masahiko Igaue

IPC: H05K1/16

CPC classification number: H05K1/183 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/15153 ,  H01L2924/15313 ,  H01L2924/19105 ,  H01L2924/30107 ,  H05K1/0298 ,  H05K1/0306 ,  H05K3/284 ,  H05K3/4069 ,  H05K3/4614 ,  H05K3/4697 ,  H05K2201/10515 ,  H05K2201/10636 ,  H05K2203/049 ,  H05K2203/061 ,  H05K2203/063 ,  Y02P70/611 ,  Y10T29/49126 ,  H01L2924/00 ,  H01L2224/0401

Abstract: A multilayered printed wiring board includes a plurality of insulating layers; a plurality of wiring layers which are located between the corresponding adjacent insulating layers; and a plurality of interlayer connection conductors for electrically connecting the wiring layers through the insulating layers; wherein a cavity is formed through one or more of the insulating layers so as to insert a first electric/electronic component and an area for embedding a second electric/electronic component is defined for the insulating layers.

公开(公告)号：USRE43957E1

公开(公告)日：2013-02-05

申请号：US13157527

申请日：2011-06-10

Applicant: Taturo Nagai

Inventor： Taturo Nagai

IPC: H01P5/12 ,  H01P3/08

CPC classification number: H03H9/725 ,  H01L2924/19105 ,  H01P1/047 ,  H03H9/0542 ,  H03H9/0576 ,  H03H9/72 ,  H05K1/0243 ,  H05K1/113 ,  H05K1/114 ,  H05K1/117 ,  H05K1/181 ,  H05K2201/1006 ,  H05K2201/10522 ,  H05K2201/10636 ,  Y02P70/611

Abstract: In a high-frequency module, mounting lands arranged to mount at least one filter device having at least one set of an unbalanced terminal and two balanced terminals are provided at one side of a substrate top surface, and mounting lands arranged to mount at least one element electrically connected to the filter device are arranged at the opposite side. At least two of a plurality of connection terminals provided on a substrate bottom surface are respectively connected to conductor patterns connected to via-hole conductors penetrating the substrate within a mounting area for mounting the filter device via connection lines and are arranged at a pitch which is less than the pitch of the via-hole conductors.

公开(公告)号：US08325489B2

公开(公告)日：2012-12-04

申请号：US12941265

申请日：2010-11-08

Applicant: Masaaki Togashi ,  Kouji Yamada

Inventor： Masaaki Togashi ,  Kouji Yamada

IPC: H05K7/00

CPC classification number: H05K1/0231 ,  H05K1/112 ,  H05K1/141 ,  H05K1/181 ,  H05K1/182 ,  H05K2201/049 ,  H05K2201/10515 ,  H05K2201/10636 ,  H05K2201/10651 ,  H05K2201/10674 ,  Y02P70/611

Abstract: An electronic component mounting structure which can reduce the ESL while saving the space when mounting electronic components is provided. A first electronic component 7 is electrically connected to surface-mounted electrode parts 11A, 12A at metal terminals 26, 27 such that a first capacitor 24 having a greater capacitance and a mounting surface 4a of a multilayer substrate 4 are separated from each other. A second electronic component 8 is arranged between the first capacitor 24 and the mounting surface 4a and electrically connected to surface-mounted electrode parts 12B, 11B at second terminal electrodes 32, 33. The second electronic component 8 overlaps the first capacitor 24 when seen in the laminating direction. The first electronic component 7 is mounted to the multilayer substrate 4 such that first terminal electrodes 22, 23 oppose each other in a predetermined direction D1. The second electronic component 8 is mounted to the multilayer substrate 4 such that the second terminal electrodes 32, 33 oppose each other in the predetermined direction D1.

Abstract translation: 提供一种电子部件安装结构，其能够在安装电子部件的同时节省空间的同时减小ESL。 第一电子部件7在金属端子26,27处电连接到表面安装电极部分11A，12A，使得具有较大电容的第一电容器24和多层基板4的安装表面4a彼此分离。 第二电子部件8布置在第一电容器24和安装表面4a之间，并且在第二端子电极32,33处与表面安装的电极部分12B，11B电连接。第二电子部件8与第一电容器24重叠， 层压方向。 第一电子部件7安装到多层基板4，使得第一端子电极22,23在预定方向D1上彼此相对。 第二电子部件8安装到多层基板4，使得第二端子电极32,33在预定方向D1上彼此相对。

公开(公告)号：US08315060B2

公开(公告)日：2012-11-20

申请号：US12888452

申请日：2010-09-23

Applicant: Yutaka Morikita ,  Yuji Kataoka

Inventor： Yutaka Morikita ,  Yuji Kataoka

IPC: H05K1/00 ,  H05K1/18 ,  H05K7/00

CPC classification number: H01L23/3121 ,  H01L23/552 ,  H01L24/16 ,  H01L25/165 ,  H01L2223/6677 ,  H01L2224/131 ,  H01L2224/16238 ,  H01L2224/76155 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/1531 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/3025 ,  H05K1/0218 ,  H05K1/023 ,  H05K1/185 ,  H05K3/284 ,  H05K3/4069 ,  H05K3/4647 ,  H05K2201/0715 ,  H05K2201/10636 ,  H05K2203/013 ,  Y02P70/611

Abstract: An electronic component module includes a circuit substrate including surface mount components mounted thereon, a resin layer embedding the surface mount components, and a conductor layer provided on a surface of the resin layer, wherein a conductive post is provided on the surface mount component, and an external electrode having a ground potential provided on the surface mount component is conductively connected to the conductor layer through the conductive post, whereby the conductor layer defines a shielding layer.

Abstract translation: 电子部件模块包括电路基板，其上安装有表面安装部件，嵌入表面安装部件的树脂层和设置在树脂层表面上的导体层，其中在表面安装部件上设置有导电柱， 具有设置在表面安装部件上的接地电位的外部电极通过导电柱导电地连接到导体层，由此导体层限定屏蔽层。

公开(公告)号：US08314343B2

公开(公告)日：2012-11-20

申请号：US12200920

申请日：2008-08-28

Applicant: Yusuke Inoue ,  Eiji Mugiya ,  Masashi Miyazaki ,  Tatsuro Sawatari ,  Yuichi Sugiyama

Inventor： Yusuke Inoue ,  Eiji Mugiya ,  Masashi Miyazaki ,  Tatsuro Sawatari ,  Yuichi Sugiyama

IPC: H05K1/18 ,  H05K3/30

CPC classification number: H05K1/185 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/2518 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2924/14 ,  H01L2924/3025 ,  H01L2924/351 ,  H05K1/056 ,  H05K3/445 ,  H05K3/4608 ,  H05K3/4661 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/10636 ,  H05K2203/1152 ,  H05K2203/1469 ,  Y02P70/611 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49155 ,  H01L2924/00

Abstract: In a multi-layer substrate including a core formed with a plurality of holes capable of containing an electronic part, a bottom insulating resin layer formed on a bottom surface of the core, a top insulating resin layer formed on a top surface of the core, a wiring layer selectively formed on an outer layer of the bottom insulating resin layer or top insulating resin layer, and an electronic part contained in the holes, both of the bottom and top insulating resin layers have a structure that is a combination of a resin which is changed to cohesiveness when heated and which undergoes smaller plastic deformation when heated to a higher temperature and an insulating resin layer which has a thickness sufficient to maintain insulation between the electronic part or a conductor of the core and the wiring layer and which inherently undergoes small plastic deformation, so that the electronic part can be securely and sealed in the holes without using a particular adhesive.

Abstract translation: 在包括形成有能够容纳电子部件的多个孔的芯的多层基板中，形成在芯的底面上的底部绝缘树脂层，形成在芯的顶面上的顶部绝缘树脂层， 选择性地形成在底部绝缘树脂层或顶部绝缘树脂层的外层上的布线层和包含在孔中的电子部件，两个顶部和顶部绝缘树脂层都具有以下结构：树脂的组合 在加热时变为粘结性，当被加热到较高温度时会变得较小的塑性变形，并且绝缘树脂层具有足以保持电子部件或芯的导体与布线层之间的绝缘的厚度并且固有地经历小的绝缘树脂层 塑性变形，使得电子部件可以牢固地密封在孔中而不使用特定的粘合剂。