公开(公告)号：US07231701B1

公开(公告)日：2007-06-19

申请号：US11326476

申请日：2006-01-06

Applicant: Ho-Ching Yang

Inventor： Ho-Ching Yang

IPC: B23P6/00

CPC classification number: H05K3/0052 ,  H05K3/0097 ,  H05K3/225 ,  H05K2201/0909 ,  H05K2201/09145 ,  H05K2203/167 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/4973 ,  Y10T29/49732 ,  Y10T29/49734 ,  Y10T29/49735 ,  Y10T29/49737

Abstract: Modular PCB and method of replacing one of a plurality of modules of a first PCB are provided. One embodiment of the method includes checking each module of the first PCB and each of a plurality of modules of a second PCB, cutting a malfunctioned module from the first PCB to leave a rectangular vacant area if the malfunctioned module is found, forming a plurality of indents on each side of the vacant area, cutting a good module from the second PCB if the good module is found, forming a plurality of projections on each side of the good module, placing the good module in the vacant area for coupling the indents and the projections, and applying adhesive (e.g., resin) into the coupled indents and projections for fastening the good module in the vacant area.

Abstract translation: 提供了模块化PCB和替换第一PCB的多个模块中的一个的方法。 该方法的一个实施例包括检查第一PCB的每个模块和第二PCB的多个模块中的每个模块，如果发现故障模块，则从第一PCB切割故障模块以留下矩形空白区域，形成多个 如果发现好的模块，则在第二PCB上切割好模块，在良好模块的每一侧形成多个突起，将好的模块放置在空的区域中以连接凹口和 突起，并将粘合剂（例如，树脂）施加到联接的凹口和突起中，以将良好模块紧固在空闲区域中。

公开(公告)号：US07223636B2

公开(公告)日：2007-05-29

申请号：US10961041

申请日：2004-10-12

Applicant: Yoshihiko Kobayashi ,  Susumu Sato ,  Koki Tanimoto ,  Tomio Yamada ,  Hirokazu Nakajima ,  Tomoaki Kudaishi ,  Yoshinori Shiokawa ,  Toshiharu Niitsu ,  Tsutomu Ida

Inventor： Yoshihiko Kobayashi ,  Susumu Sato ,  Koki Tanimoto ,  Tomio Yamada ,  Hirokazu Nakajima ,  Tomoaki Kudaishi ,  Yoshinori Shiokawa ,  Toshiharu Niitsu ,  Tsutomu Ida

IPC: H01L21/44

CPC classification number: H05K3/0052 ,  H01L21/481 ,  H01L2224/48227 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/0306 ,  H05K3/284 ,  H05K2201/09036 ,  H05K2201/0909 ,  H05K2203/302 ,  H01L2924/00012

Abstract: In a dividing method according to the present invention, a wiring board formed of ceramic is forced up (upper swing) by a lower clamp claw of a clamper, and some of a protruded wiring board portion protruding from a conveying chute is pressed against a support body to perform a first division under bending stress. Thereafter, the upward-located clamper is rotatably swung (lower swing) downward to allow an upper clamp claw to press down the protruded wiring board portion, thereby performing a reverse division at the first division section again as a second division. Since the second division allows a tensile force to act on a remaining and thin non-divided resin portion, the non-divided resin portion is torn off. Thus, the perfect division is enabled. Fractionalizing is done by a one-row division and an individual division so that each semiconductor device is formed.

公开(公告)号：US07170756B2

公开(公告)日：2007-01-30

申请号：US10655318

申请日：2003-09-04

Applicant: Balu Balakrishnan

Inventor： Balu Balakrishnan

IPC: H05K7/02 ,  H05K7/06 ,  H05K7/08 ,  H05K7/10

CPC classification number: H05K3/225 ,  H02M3/00 ,  H05K1/0262 ,  H05K1/0293 ,  H05K3/0047 ,  H05K3/005 ,  H05K2201/0909 ,  H05K2201/09127 ,  H05K2201/10689 ,  H05K2203/0228 ,  H05K2203/171 ,  H05K2203/175 ,  Y10T29/49004 ,  Y10T29/49082 ,  Y10T29/49105 ,  Y10T29/49121 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49787 ,  Y10T29/49789 ,  Y10T29/4979 ,  Y10T29/49798 ,  Y10T29/5149 ,  Y10T29/515

Abstract: Electrical circuit trimming methods. In one aspect of the invention, a trimming method includes assembling one or more components of an electrical circuit onto a printed circuit board having one or more electrical connections coupled to the said one or more components. An electrical parameter of the electrical circuit is then trimmed. The trimming of the electrical parameter of the electrical circuit includes removing a portion of the printed circuit board to break the electrical connection on the printed circuit board. In another aspect of the invention, the trimming the electrical parameter of the electrical circuit includes electrical programming of the electrical circuit.

Abstract translation: 电路修整方法。 在本发明的一个方面，修整方法包括将电路的一个或多个部件组装到具有耦合到所述一个或多个部件的一个或多个电连接的印刷电路板上。 然后对电路的电气参数进行修整。 修整电路的电气参数包括去除印刷电路板的一部分以破坏印刷电路板上的电连接。 在本发明的另一方面，修整电路的电气参数包括电路的电气编程。

公开(公告)号：US07162794B2

公开(公告)日：2007-01-16

申请号：US10348024

申请日：2003-01-22

Applicant: Norio Sakai ,  Kazuhiro Iida

Inventor： Norio Sakai ,  Kazuhiro Iida

IPC: H05K3/30

CPC classification number: H01L23/585 ,  H01L21/481 ,  H01L2924/0002 ,  H05K1/0306 ,  H05K3/0052 ,  H05K2201/09036 ,  H05K2201/0909 ,  H05K2201/09781 ,  H05K2203/302 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49163 ,  Y10T29/49165 ,  Y10T29/49789 ,  Y10T29/4979 ,  H01L2924/00

Abstract: A multilayer integrated substrate includes breaking grooves arranged in a grid pattern so as to section the main surface of the substrate into a plurality of blocks, and also includes fracture-preventing conductor films arranged so as to cross the breaking grooves. The fracture-preventing conductor films contain a metal component that prevents undesirable fracturing of the multilayer integrated substrate along the breaking grooves.

Abstract translation: 多层集成基板包括以栅格图案布置的断开槽，以将基板的主表面分割成多个块，并且还包括布置成穿过断开槽的防裂导体膜。 防断裂导体膜含有防止多层一体化基板沿着断裂槽的不希望的断裂的金属成分。

公开(公告)号：US20060223228A1

公开(公告)日：2006-10-05

申请号：US11323269

申请日：2005-12-30

Applicant: Xiao-Hua Kong

Inventor： Xiao-Hua Kong

IPC: H01L21/00

CPC classification number: H01L21/67132 ,  H01L21/786 ,  H05K1/0269 ,  H05K1/0306 ,  H05K3/0052 ,  H05K2201/09036 ,  H05K2201/0909 ,  H05K2201/09918 ,  H05K2203/1383 ,  H05K2203/302 ,  Y10T29/49135

Abstract: A ceramic substrate (100) includes a top surface, a plurality of identification marks (104), a protective compound (110), a bottom surface, and a plurality of grooves (106). The top surface includes a first area and a second area. The first area is defined at one or more edges portions of the top surface. The second area is defined inside the first area. The identification marks are arranged on the first area. The protective compound is covered on the second area. The grooves are defined at the bottom surface, and corresponding to the identification marks. A related method for breaking a ceramic substrate includes: (a) pasting one or more tapes on the first area; (b) covering protective compound on the second area; (c) removing the tapes; (d) cutting the protective compound according to the identification marks; and (e) breaking the ceramic substrate into individual circuit unit pieces along the grooves.

Abstract translation: 陶瓷基板（100）包括顶表面，多个识别标记（104），保护化合物（110），底表面和多个凹槽（106）。 顶表面包括第一区域和第二区域。 第一区域被限定在顶表面的一个或多个边缘部分。 第二个区域定义在第一个区域内。 识别标记布置在第一区域上。 保护性化合物覆盖在第二区域。 凹槽限定在底面，并与识别标记对应。 破坏陶瓷基板的相关方法包括：（a）在第一区域上粘贴一个或多个带; （b）在第二区覆盖保护化合物; （c）清除胶带; （d）根据识别标记切割保护性化合物; 和（e）沿着凹槽将陶瓷基板分解成单独的电路单元件。

公开(公告)号：US20060087825A1

公开(公告)日：2006-04-27

申请号：US10970228

申请日：2004-10-21

Applicant: Douglas Pfautz

Inventor： Douglas Pfautz

IPC: H05K1/14 ,  H05K1/11

CPC classification number: H05K13/0069 ,  H05K3/0052 ,  H05K2201/09063 ,  H05K2201/0909 ,  H05K2203/0165

Abstract: A retaining member for a circuit board array is provided. The retaining member includes an elongated support post having a first end and an opposite second end. A protrusion extends from the first end. The protrusion is configured to be received in a slot having side walls in a circuit board array. The support post is movable to move the protrusion within the slot from a first position wherein the protrusion is disengaged from the side walls of the slot to a second position wherein the protrusion engages the side walls of the slot to retain the circuit board array.

公开(公告)号：US06976415B2

公开(公告)日：2005-12-20

申请号：US11078063

申请日：2005-03-11

Applicant: Tomoe Suzuki ,  Shinji Yuri ,  Kazuhisa Sato ,  Kozo Yamasaki

Inventor： Tomoe Suzuki ,  Shinji Yuri ,  Kazuhisa Sato ,  Kozo Yamasaki

IPC: B32B15/08 ,  B32B27/38 ,  H05K1/05 ,  H05K3/00 ,  H05K3/44 ,  B26D3/00

CPC classification number: H05K1/056 ,  B32B15/08 ,  B32B27/38 ,  H05K3/0052 ,  H05K3/44 ,  H05K3/445 ,  H05K2201/0909 ,  H05K2201/09709 ,  H05K2201/09745 ,  H05K2203/0369 ,  H05K2203/1572 ,  Y10S428/901 ,  Y10T29/49126 ,  Y10T29/49135 ,  Y10T29/49165 ,  Y10T83/0333 ,  Y10T83/0341 ,  Y10T83/0581 ,  Y10T428/12 ,  Y10T428/12361 ,  Y10T428/15 ,  Y10T428/24298 ,  Y10T428/24314 ,  Y10T428/24917

Abstract: The invention provides a method for manufacturing printed wiring substrates which can manufacture printed wiring substrates each having resin dielectric layers of uniform thickness and excellent surface flatness while maintaining favorable cutting performance in a dicing step. A multi-printed wiring-substrate panel is manufactured which includes a metal plate having a first main surface and a second main surface, and resin dielectric layers disposed on the first and second main surfaces. The metal plate has first depression portions and second depression portions. The first depression portions are opened at the first main surface and arranged discontinuously along predetermined cutting lines. The second depression portions are opened at the second main surface and arranged discontinuously along the predetermined cutting lines. The multi-printed wiring-substrate panel is cut along the predetermined cutting lines into a plurality of printed wiring substrates.

Abstract translation: 本发明提供一种制造印刷布线基板的方法，其可以制造印刷布线基板，每个印刷布线基板具有均匀厚度的树脂电介质层和优异的表面平坦度，同时在切割步骤中保持良好的切割性能。 制造了包括具有第一主表面和第二主表面的金属板以及设置在第一和第二主表面上的树脂电介质层的多印刷布线基板。 金属板具有第一凹部和第二凹部。 第一凹陷部分在第一主表面处被打开，并且沿着预定的切割线不连续地布置。 第二凹陷部分在第二主表面处被打开，并且沿着预定切割线不连续地布置。 多个印刷线路基板被沿着预定的切割线切割成多个印刷布线基板。

公开(公告)号：US20050254218A1

公开(公告)日：2005-11-17

申请号：US11127238

申请日：2005-05-12

Applicant: Yoshitaka Mouri

Inventor： Yoshitaka Mouri

IPC: H05K7/20 ,  H04N5/64 ,  H05K1/02 ,  H05K1/14 ,  H05K3/00

CPC classification number: H05K1/0272 ,  H04N5/64 ,  H05K1/141 ,  H05K3/0052 ,  H05K2201/09063 ,  H05K2201/0909

Abstract: The invention provides an electric apparatus having a printed circuit board with an improved heat dissipation capacity, and, in particular, to provide an electric apparatus requiring plural printed circuit boards that has an improved heat dissipation efficiency and can be produced at a low cost. A main printed circuit board 10 and a sub board 17 are composite-molded, and the sub board 17 is formed at an area close to or immediately below a heat-generating electronic component 23 or a heat dissipation plate 23a. Thus, by separating the sub board 17 off the main printed circuit board 10, a hole serving as a ventilating hole is formed in the main printed circuit board 10 at the area close to or immediately below the heat-generating electronic component 23 or the heat dissipation plate 23a.

Abstract translation: 本发明提供了一种具有改善的散热能力的印刷电路板的电气设备，特别是提供一种需要多个印刷电路板的电气设备，其具有改善的散热效率并且可以以低成本制造。 主印刷电路板10和子板17被复合成型，并且副板17形成在发热电子部件23或散热板23a附近或紧邻的区域。 因此，通过将主板17从主印刷电路板10分离，在主印刷电路板10中，在靠近发电电子部件23或发热电子部件23的下方的区域形成用作通气孔的孔 散热板23a。

公开(公告)号：US20050176175A1

公开(公告)日：2005-08-11

申请号：US10905238

申请日：2004-12-22

Applicant: Masaru Kanakubo

Inventor： Masaru Kanakubo

IPC: H05K1/02 ,  H01L21/301 ,  H01L21/48 ,  H01L21/50 ,  H01L21/56 ,  H01L21/60 ,  H01L23/12 ,  H01L23/433 ,  H01L23/498 ,  H01L25/04 ,  H01L25/16 ,  H01L25/18 ,  H05K1/05 ,  H05K3/00 ,  H05K3/28

CPC classification number: H05K3/0052 ,  H01L21/481 ,  H01L21/565 ,  H01L23/4334 ,  H01L23/49861 ,  H01L24/48 ,  H01L24/97 ,  H01L25/165 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/18301 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H05K1/056 ,  H05K3/284 ,  H05K2201/09036 ,  H05K2201/0909 ,  H05K2201/1034 ,  H05K2203/0278 ,  H05K2203/302 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

Abstract: A method of manufacturing a hybrid integrated circuit device includes the steps of forming a plurality of units each including a conductive pattern on a surface of a board made of metal, forming grooves along boundaries of the respective units of the board, electrically connecting circuit elements to the conductive patterns in the respective units, separating the respective circuit boards by dividing the board along the grooves, and flattening side surfaces of the circuit boards by pressing the side surfaces.

Abstract translation: 一种制造混合集成电路器件的方法包括以下步骤：在由金属制成的板的表面上形成各自包括导电图案的多个单元，沿着板的各个单元的边界形成凹槽，将电路元件电连接到 各个单元中的导电图案，通过沿着凹槽划分基板来分离各个电路板，以及通过按压侧表面使电路板的平坦化的侧表面分离。

公开(公告)号：US20040222202A1

公开(公告)日：2004-11-11

申请号：US10850021

申请日：2004-05-19

Inventor： Morgan T. Johnson ,  William A. Miller

IPC: B23K026/38

CPC classification number: B23K26/073 ,  B23K26/382 ,  B23K26/40 ,  B23K2101/40 ,  B23K2103/12 ,  B23K2103/172 ,  B23K2103/42 ,  B23K2103/50 ,  H05K1/0269 ,  H05K1/0393 ,  H05K1/165 ,  H05K3/0032 ,  H05K3/0052 ,  H05K3/027 ,  H05K2201/09063 ,  H05K2201/0909 ,  H05K2201/09918

Abstract: A unified process of making an electrical structure includes performing a plurality of laser etching operations on a workpiece, without removing the workpiece from a laser processing system. The workpiece includes a conductive material disposed on an electrically insulating substrate, and the plurality of laser etching operations include, but are not limited to, two or more of forming a fiducial, forming thick metal traces separated by high aspect ratio spaces, cutting an alignment hole, cutting a folding line, and singulating the electrical structure. In another aspect of the invention, a database is prepared, and communicatively coupled to the laser processing system to provide control signals that direct a portion of the plurality of operations of the laser processing system, wherein each plurality of etching operations is defined with respect to a common coordinate system.

Abstract translation: 制造电气结构的统一过程包括在工件上执行多个激光蚀刻操作，而不从激光处理系统移除工件。 工件包括设置在电绝缘基板上的导电材料，并且多个激光蚀刻操作包括但不限于形成基准，形成由高纵横比空间分开的厚金属迹线的两个或更多个，切割对准 孔，切割折叠线，并分割电气结构。 在本发明的另一方面中，准备数据库，并且通信地耦合到激光处理系统以提供控制信号，该控制信号指导激光处理系统的多个操作的一部分，其中对于多个蚀刻操作相对于 一个共同的坐标系。