公开(公告)号：US6093335A

公开(公告)日：2000-07-25

申请号：US974210

申请日：1997-11-20

Applicant: Ashwinkumar C. Bhatt ,  John Christopher Camp ,  Subahu Dhirubhai Desai ,  Voya Rista Markovich ,  Michael Wozniak

Inventor： Ashwinkumar C. Bhatt ,  John Christopher Camp ,  Subahu Dhirubhai Desai ,  Voya Rista Markovich ,  Michael Wozniak

IPC: B24B7/06 ,  B24B37/04 ,  B24B41/047 ,  C23F1/08 ,  H05K3/06 ,  H05K3/26 ,  B44C1/22

CPC classification number: B24B7/06 ,  B24B37/04 ,  B24B41/047 ,  C23F1/08 ,  H05K3/068 ,  H05K3/26 ,  H05K2203/025 ,  H05K2203/0346 ,  H05K2203/0353 ,  H05K2203/1509

Abstract: A method for planarizing an exposed metal surface on a substrate is provided in which surface irregularities are eliminated. A photoresist layer is first removed from the substrate. Then a conformal planarizing head is placed in contact with the metal surface while chemical etchant essentially free of abrasives is supplied to an interface between the metal substrate and the planarizing head. The surface is then planarized until it is free of irregularties.

Abstract translation: 提供了在基板上平坦化露出的金属表面的方法，其中消除了表面凹凸。 首先从基底去除光致抗蚀剂层。 然后将保形平面化头与金属表面接触，同时基本上没有磨料的化学蚀刻剂被提供给金属基底和平坦化头之间的界面。 然后将表面平坦化，直到其没有不规则。

公开(公告)号：US07596863B2

公开(公告)日：2009-10-06

申请号：US11652633

申请日：2007-01-12

Applicant: Ashwinkumar C. Bhatt ,  Robert J. Harendza ,  Robert M. Japp

Inventor： Ashwinkumar C. Bhatt ,  Robert J. Harendza ,  Robert M. Japp

IPC: H05K3/36

CPC classification number: H05K1/117 ,  H05K1/112 ,  H05K3/4611 ,  H05K2201/09127 ,  H05K2201/0919 ,  H05K2201/09472 ,  H05K2201/09845 ,  H05K2203/061 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49165 ,  Y10T29/49169

Abstract: A method of making a printed circuit board in which at least three substrates are aligned and bonded together (e.g., using lamination). Two of the substrates have openings formed therein, with each opening including a cover member located therein. During lamination, the cover members for a seal and prevent dielectric material (e.g., resin) liquefied during the lamination from contacting the conductive layers on the opposed surfaces of the inner (first) substrate. A PCB is thus formed with either a projecting edge portion or a plurality of cavities therein such that electrical connection may be made to the PCB using an edge connector or the like.

Abstract translation: 制造印刷电路板的方法，其中至少三个基板被对准并结合在一起（例如，使用层压）。 两个基板具有形成在其中的开口，每个开口包括位于其中的盖构件。 在层压期间，用于密封和防止介电材料（例如树脂）的盖构件在层压期间液化以接触内（第一）衬底的相对表面上的导电层。 因此，PCB在其中形成有突出边缘部分或多个空腔，使得可以使用边缘连接器等对PCB进行电连接。

公开(公告)号：US20080144768A1

公开(公告)日：2008-06-19

申请号：US12071537

申请日：2008-02-22

Applicant: Ashwinkumar C. Bhatt ,  Varaprasad V. Calmidi ,  James J. McNamara, ,  Sanjeev Sathe

Inventor： Ashwinkumar C. Bhatt ,  Varaprasad V. Calmidi ,  James J. McNamara, ,  Sanjeev Sathe

IPC: G01N23/04

CPC classification number: G01N23/046 ,  G01N2223/3103 ,  G01N2223/419 ,  G01N2223/643 ,  H01J2235/1262

Abstract: A method of making an imaging inspection apparatus which involves positioning a plurality of individual imaging devices (e.g., X-ray Computer Tomography scanning devices) on a frame for directing beams onto articles having objects therein to detect the objects based on established criteria. The method also involves providing a cooling structure in such a manner that it will direct cooling fluid onto the imaging devices to cool these during apparatus operation.

Abstract translation: 一种制造成像检查装置的方法，其包括将多个单独的成像装置（例如，X射线计算机断层摄影扫描装置）定位在框架上，用于将束指向具有其中的物体的物品，以基于建立的标准检测物体。 该方法还包括以这样的方式提供冷却结构，以便在设备操作期间将冷却流体引导到成像装置上以冷却它们。

公开(公告)号：US06274291B1

公开(公告)日：2001-08-14

申请号：US09195010

申请日：1998-11-18

Applicant: Ashwinkumar C. Bhatt ,  John C. Camp ,  Mary Beth Fletcher ,  Kenneth Lynn Potter ,  John A. Welsh

Inventor： Ashwinkumar C. Bhatt ,  John C. Camp ,  Mary Beth Fletcher ,  Kenneth Lynn Potter ,  John A. Welsh

IPC: G03F700

CPC classification number: H05K3/0023 ,  H01L21/4846 ,  H01L21/4857 ,  H01L21/486 ,  H05K3/064 ,  H05K3/4644 ,  H05K3/4661 ,  H05K2201/0195 ,  H05K2201/09509 ,  H05K2203/1394

Abstract: A technique is provided for forming a circuitized substrate which substantially reduces defects in a circuit board formed of multiple layers of dielectric material on each of which layers electrical circuitry is formed. Each layer of dielectric material is formed of two distinct and separate coatings or sheets or films of a photopatternable dielectric material which is photoformed to provide through openings to the layer of circuitry below and then plated with the desired circuitry including plating in the photoformed openings to form vias. In this way if there is a pin hole type defect in either coating or sheet of dielectric material, in all probability it will not align with a similar defect in the other sheet or coating of the dielectric layer, thus preventing unwanted plating extending from one layer of circuitry to the underlying layer of circuitry.

公开(公告)号：US5922517A

公开(公告)日：1999-07-13

申请号：US662165

申请日：1996-06-12

Applicant: Anilkumar Chinuprasad Bhatt ,  Ashwinkumar C. Bhatt ,  Voya Rista Markovich ,  William Earl Wilson ,  Gerald Walter Jones

Inventor： Anilkumar Chinuprasad Bhatt ,  Ashwinkumar C. Bhatt ,  Voya Rista Markovich ,  William Earl Wilson ,  Gerald Walter Jones

IPC: H05K3/00 ,  G03F7/095 ,  H05K3/18 ,  G03F7/00

CPC classification number: H05K3/184 ,  G03F7/095

Abstract: Bridging between electrically conductive circuit features during conformal plating is prevented by avoiding the deposition of catalytic seed material onto non-circuit areas of the substrate. Preparatory to forming electrical circuit features on a nonconductive substrate by the full additive process, extraneous seed material is either trapped between two layers of a photoimageable film, whereby it is unavailable during plating, or deposited on the surface of an aqueous photoimageable film, which is removed prior to plating. The method embodying the present invention eliminates the need for seed removal after initial plating and prior to conformal plating of a precious metal over the initial plating.

Abstract translation: 通过避免催化种子材料沉积到衬底的非电路区域上，防止了在保形电镀过程中导电电路特征之间的桥接。 准备通过完全添加的方法在非导电基材上形成电路特征，外来种子材料被捕获在两层可光成像膜之间，由此在电镀期间不可用，或者沉积在水性可光成像膜的表面上， 在电镀之前移除。 实施本发明的方法消除了在初始镀覆之后以及在初始镀覆之前对贵金属进行适形电镀之前的种子去除的需要。

公开(公告)号：US5905018A

公开(公告)日：1999-05-18

申请号：US957275

申请日：1997-10-24

Applicant: Anilkumar Chinuprasad Bhatt ,  Ashwinkumar C. Bhatt ,  Voya Rista Markovich ,  William Earl Wilson ,  Gerald Walter Jones

Inventor： Anilkumar Chinuprasad Bhatt ,  Ashwinkumar C. Bhatt ,  Voya Rista Markovich ,  William Earl Wilson ,  Gerald Walter Jones

IPC: H05K3/00 ,  G03F7/095 ,  H05K3/18 ,  G03F7/20

CPC classification number: H05K3/184 ,  G03F7/095

Abstract: Bridging between electrically conductive circuit features during conformal plating is prevented by avoiding the deposition of catalytic seed material onto non-circuit areas of the substrate. Preparatory to forming electrical circuit features on a nonconductive substrate by the full additive process, extraneous seed material is either trapped between two layers of a photoimageable film, whereby it is unavailable during plating, or deposited on the surface of an aqueous photoimageable film, which is removed prior to plating. The method embodying the present invention eliminates the need for seed removal after initial plating and prior to conformal plating of a precious metal over the initial plating.

公开(公告)号：US5599747A

公开(公告)日：1997-02-04

申请号：US495248

申请日：1995-06-27

Applicant: Ashwinkumar C. Bhatt ,  Thomas P. Duffy ,  David E. Houser ,  Gerald W. Jones ,  Jeffrey McKeveny ,  Kenneth L. Potter

Inventor： Ashwinkumar C. Bhatt ,  Thomas P. Duffy ,  David E. Houser ,  Gerald W. Jones ,  Jeffrey McKeveny ,  Kenneth L. Potter

IPC: H01L23/12 ,  H01L23/14 ,  H01L23/367 ,  H01L23/498 ,  H05K1/02 ,  H05K1/03 ,  H05K1/18 ,  H05K3/00 ,  H05K7/02 ,  H01L21/60

CPC classification number: H05K1/021 ,  H01L23/145 ,  H01L23/3677 ,  H01L23/49822 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/15311 ,  H01L2924/1532 ,  H05K1/182 ,  H05K2201/09127 ,  H05K2201/09981 ,  H05K2203/049 ,  H05K3/0061 ,  Y10T29/4913 ,  Y10T29/49155

Abstract: A method of making a circuitized substrate which may be utilized as a chip carrier structure. The method involves the steps of providing a dielectric member and partially routing this member to define a temporary support portion therein. Metallization and circuitization may then occur, following which the temporary support portion is removed. This temporary support thus assures effective support for the photoresist used as part of the circuitization process. Thus, the photoresist is capable of being applied in sheetlike form for spanning the relatively small openings of the dielectric without sagging, bowing, etc., which may adversely impact subsequent processing steps.

Abstract translation: 制造可用作芯片载体结构的电路化衬底的方法。 该方法包括提供电介质构件并部分地布置该构件以在其中限定临时支撑部分的步骤。 然后可以发生金属化和电路化，随后移除临时支撑部分。 因此，这种临时支撑物确保了作为电路化过程的一部分使用的光致抗蚀剂的有效支撑。 因此，光致抗蚀剂能够以片状形式施加以跨越电介质的相对小的开口而不会下垂，弯曲等，这可能不利地影响随后的处理步骤。

公开(公告)号：US5578796A

公开(公告)日：1996-11-26

申请号：US466081

申请日：1995-06-06

Applicant: Ashwinkumar C. Bhatt ,  Thomas P. Duffy ,  Gerry A. Hackett ,  Jeffrey McKeveny

Inventor： Ashwinkumar C. Bhatt ,  Thomas P. Duffy ,  Gerry A. Hackett ,  Jeffrey McKeveny

IPC: H01L21/48 ,  H05K1/18 ,  H05K3/46 ,  H05K1/02

CPC classification number: H05K3/184 ,  H01L21/4807 ,  H05K3/4697 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/15153 ,  H01L2924/1517 ,  H05K1/021 ,  H05K1/182 ,  H05K2201/09845 ,  H05K2203/063 ,  H05K2203/308 ,  H05K3/0061 ,  H05K3/4611 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49155

Abstract: According to the present invention, a method of laminating at least two substrates together and circuitizing at least one surface of the laminate is provided. Pressure is exerted against opposite surfaces of each of said two substrates. An opening extends from a circuit-receiving surface of at least one of said substrates. A plug is provided which is configured to removably fit into said opening and has a support surface thereon which is substantially coplanar with the circuit-receiving surface when said plug is positioned in the opening. The plug is inserted in the opening with the support surface substantially coplanar with the circuit-receiving surface. The substrates are laminated by application of pressure on the opposite surfaces of the substrates. The circuit-receiving surface and the support surface are covered with a sheet of dry film photoresist to seal around the opening with said plug member supporting said sheet of photoresist in the region of the opening. The dry film resist material is patterned and developed in a predetermined pattern, and the surface is circuitized with electrical circuitry. Any remaining photoresist is stripped, and said plug member is removed.

Abstract translation: 根据本发明，提供了将至少两个基板层合在一起并使层压体的至少一个表面电路化的方法。 对所述两个基板的每一个的相对表面施加压力。 开口从至少一个所述基板的电路接收表面延伸。 提供插头，其构造成可移除地装配到所述开口中并且具有其上的支撑表面，当所述插头位于开口中时，该支撑表面基本上与电路接收表面共面。 插头插入开口中，支撑表面基本上与电路接收表面共面。 通过在衬底的相对表面上施加压力来层压衬底。 电路接收表面和支撑表面被一片干膜光致抗蚀剂覆盖，以在开口的区域中用支撑所述光致抗蚀剂片的插塞构件围绕开口密封。 干膜抗蚀剂材料以预定图案被图案化和显影，并且表面被电路电路化。 剥离任何剩余的光致抗蚀剂，并且去除所述插塞构件。

公开(公告)号：US5542175A

公开(公告)日：1996-08-06

申请号：US359491

申请日：1994-12-20

Applicant: Ashwinkumar C. Bhatt ,  Thomas P. Duffy ,  Gerry A. Hackett ,  Jeffrey McKeveny

Inventor： Ashwinkumar C. Bhatt ,  Thomas P. Duffy ,  Gerry A. Hackett ,  Jeffrey McKeveny

IPC: H01L21/48 ,  H05K1/18 ,  H05K3/46 ,  H05K3/10

CPC classification number: H05K3/184 ,  H01L21/4807 ,  H05K3/4697 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/10253 ,  H01L2924/15153 ,  H01L2924/1517 ,  H05K1/021 ,  H05K1/182 ,  H05K2201/09845 ,  H05K2203/063 ,  H05K2203/308 ,  H05K3/0061 ,  H05K3/4611 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49155

Abstract: According to the present invention, a method of laminating at least two substrates together and circuitizing at least one surface of the laminate is provided. Pressure is exerted against opposite surfaces of each of said two substrates. An opening extends from a circuit-receiving surface of at least one of said substrates. A plug is provided which is configured to removably fit into said opening and has a support surface thereon which is substantially coplanar with the circuit-receiving surface when said plug is positioned in the opening. The plug is inserted in the opening with the support surface substantially coplanar with the circuit-receiving surface. The substrates are laminated by application of pressure on the opposite surfaces of the substrates. The circuit-receiving surface and the support surface are covered with a sheet of dry film photoresist to seal around the opening with said plug member supporting said sheet of photoresist in the region of the opening. The dry film resist material is patterned and developed in a predetermined pattern, and the surface is circuitized with electrical circuitry. Any remaining photoresist is stripped, and said plug member is removed.

Abstract translation: 根据本发明，提供了将至少两个基板层合在一起并使层压体的至少一个表面电路化的方法。 对所述两个基板的每一个的相对表面施加压力。 开口从至少一个所述基板的电路接收表面延伸。 提供插头，其构造成可移除地装配到所述开口中并且具有其上的支撑表面，当所述插头位于开口中时，该支撑表面基本上与电路接收表面共面。 插头插入开口中，支撑表面基本上与电路接收表面共面。 通过在衬底的相对表面上施加压力来层压衬底。 电路接收表面和支撑表面被一片干膜光致抗蚀剂覆盖，以在开口的区域中用支撑所述光致抗蚀剂片的插塞构件围绕开口密封。 干膜抗蚀剂材料以预定图案被图案化和显影，并且表面被电路电路化。 剥离任何剩余的光致抗蚀剂，并且去除所述插塞构件。

公开(公告)号：US07490984B2

公开(公告)日：2009-02-17

申请号：US12071537

申请日：2008-02-22

Applicant: Ashwinkumar C. Bhatt ,  Varaprasad V. Calmidi ,  James J. McNamara, Jr. ,  Sanjeev Sathe

Inventor： Ashwinkumar C. Bhatt ,  Varaprasad V. Calmidi ,  James J. McNamara, Jr. ,  Sanjeev Sathe

IPC: H01J35/10 ,  H01J35/12 ,  H05G1/02 ,  G01N23/083

CPC classification number: G01N23/046 ,  G01N2223/3103 ,  G01N2223/419 ,  G01N2223/643 ,  H01J2235/1262

Abstract: A method of making an imaging inspection apparatus which involves positioning a plurality of individual imaging devices (e.g., X-ray Computer Tomography scanning devices) on a frame for directing beams onto articles having objects therein to detect the objects based on established criteria. The method also involves providing a cooling structure in such a manner that it will direct cooling fluid onto the imaging devices to cool these during apparatus operation.

Abstract translation: 一种制造成像检查装置的方法，其包括将多个单独的成像装置（例如，X射线计算机断层摄影扫描装置）定位在框架上，用于将束指向具有其中的物体的物品，以基于建立的标准检测物体。 该方法还包括以这样的方式提供冷却结构，以便在设备操作期间将冷却流体引导到成像装置上以冷却它们。