公开(公告)号：US20230269020A1

公开(公告)日：2023-08-24

申请号：US18173664

申请日：2023-02-23

Applicant: Infinera Corp.

Inventor： Jonathan Michael Buset ,  Nisar Ahmed ,  Francisco Javier Vaquero Caballero ,  Thomas Gerard ,  Stephane St-Laurent

IPC: H04J14/02

CPC classification number: H04J14/0212

Abstract: A multiplexer module and method are herein disclosed. The multiplexer module comprises a WSS configured to receive a plurality of first optical signals, selectively multiplex the first optical signals into a second optical signal, and output the second optical signal; an OPM operable to determine a power of one or more slice within a sample optical signal, the sample optical signal being selected from a group consisting of a particular optical signal of the first optical signals and a portion of the second optical signal including the particular optical signal; a processor; and a memory storing instructions that cause the processor to: validate the particular optical signal using the power of one or more slice within the sample optical signal; and if the particular optical signal is valid, cause the WSS to open a particular passband so as to multiplex the particular optical signal into the second optical signal.

公开(公告)号：US20230261749A1

公开(公告)日：2023-08-17

申请号：US18163636

申请日：2023-02-02

Applicant: Infinera Corp.

Inventor： Baranidhar Ramanathan ,  Ashok Kunjidhapatham ,  Sanjeev Ramachandran ,  Johathan Buset ,  Nikhil Satyarthi ,  Bhupathi Rao Yellinedi ,  Badareenath Alur Sreenivasacharya ,  Anil Naduvile Veedu ,  Aryabhata Deshpande ,  Servesh Singh ,  Dinesh Kumar Parkasam

IPC: H04B10/27 ,  H04J14/02 ,  H04B10/294

CPC classification number: H04B10/271 ,  H04J14/0221 ,  H04B10/294

Abstract: Networks and network elements having a service and power control orchestrator are disclosed, including a network element comprising a processor; a first port coupled to a first optical link carrying a first optical signal; a WSS having a multiplexer, a demultiplexer, and a control block operable to control the multiplexer/demultiplexer. The WSS operable to switch the first optical signal into a second optical signal. A second port is coupled to a second optical link, operable to carry the second optical signal, and in optical communication with the WSS. A memory stores an orchestrator application, an OTSA component, a service component, and instructions that cause the processor to: store a logical ROADM model having a connectivity matrix of the network element; receive a communication associated with the control block based on the logical ROADM model; and transmit, to the control block, a service loading sequence based on the logical ROADM model.

公开(公告)号：US20230246726A1

公开(公告)日：2023-08-03

申请号：US18160659

申请日：2023-01-27

Applicant: Infinera Corp.

Inventor： Ashok Kunjidhapatham ,  Ashwini Kumar Bhat ,  G J. Raghavendra ,  Anoop Rajan

IPC: H04J14/02

CPC classification number: H04J14/0227 ,  H04J14/0212 ,  H04J14/0206

Abstract: An optical network is herein described. The optical network comprises a fiber optic line, a first network element, and a second network element. The first network element comprises a first optical interface, a first processor, and a first memory storing first processor-executable instructions that cause the first processor to: activate one or more passband on the first optical interface, thereby enabling the first optical interface to transport one or more optical carrier on the one or more passband; and transmit an activation request indicative of a request to activate the one or more passband on a plurality of optical interfaces of a plurality of network elements. The second network element comprises a second optical interface, a second processor, and a second memory storing second processor-executable instructions that cause the second processor to: receive the activation request; and activate the one or more passband on the second optical interface.

公开(公告)号：US11671195B2

公开(公告)日：2023-06-06

申请号：US17326071

申请日：2021-05-20

Applicant: Infinera Corp.

Inventor： Iftekhar Hussain ,  Steven J. Hand ,  Paul N. Freeman

IPC: H04B10/00 ,  H04J14/02 ,  H04L5/00 ,  H04L5/14 ,  H04L1/1607

CPC classification number: H04J14/022 ,  H04J14/0227 ,  H04L1/1607 ,  H04L5/0005 ,  H04L5/1446

Abstract: A system comprising a hub transceiver coupled to a first network node; and a plurality of edge transceivers, each configured to be communicatively coupled to a respective second network node, and to the hub transceiver, wherein the hub transceiver is operable to transmit a first message to each of the edge transceivers, the first message comprising an indication of available optical subcarriers and availability to use multiple non-contiguous optical subcarriers; receive, a service request identifying a selected subset of the available optical subcarriers including a non-contiguous first optical subcarrier and second optical subcarrier, transmit a second message to indicate either a success or a failure, and receive, via the selected subset, data from the second network node, and wherein at least one of the edge transceivers is operable to, transmit, using the selected subset of available optical subcarriers, data from the second network node to the first network node.

公开(公告)号：US11539585B2

公开(公告)日：2022-12-27

申请号：US17383209

申请日：2021-07-22

Applicant: Infinera Corp.

Inventor： Abhinava Shivakumar Sadasivarao ,  Loukas Paraschis ,  Sharfuddin Syed ,  Robert Maher

IPC: H04L41/08 ,  H04L41/0816 ,  H04J14/02 ,  H04Q11/00 ,  H04L41/0869

Abstract: Methods for, and network elements in, packet or optical transport networks are disclosed, including a network element comprising non-transitory computer readable medium storing computer-executable instructions configured as one or more software agents that when executed with computer hardware: determine a state of the network element, comprising comparing a current state of transient properties of the network element against a predetermined, expected state of the transient properties of the network element; and verify a state of other network elements or paths in the transport network by comparing a current state of one or more network-level constraints of the other network elements or paths against a predetermined, expected state of the one or more network-level constraints on the other network elements or paths. The computer hardware may further positively or negatively acknowledge received instructions to apply a configuration to the network element based on the determination and/or verification.

公开(公告)号：US20220400058A1

公开(公告)日：2022-12-15

申请号：US17841092

申请日：2022-06-15

Applicant: Infinera Corp.

Inventor： Madhumita Pal ,  Dale Chin ,  Ramanujan Puranam ,  Madhura Joshi

IPC: H04L41/0895 ,  H04L41/0803

Abstract: A network element is herein disclosed. The network element comprises a controller card and a pluggable card. The controller card comprises a first processor; a first memory, the first memory being a first non-transitory computer-readable medium storing computer-executable instructions comprising a common software stack and a first microservice stack; and a first device; wherein the first microservice stack includes a first microservice operable to manage the first device. The pluggable card comprises a second processor; a second memory, the second memory being a second non-transitory computer-readable medium storing computer-executable instructions comprising the common software stack and a second microservice stack; and a second device; wherein the second microservice stack includes a second microservice operable to manage the second device.

公开(公告)号：US20220398252A1

公开(公告)日：2022-12-15

申请号：US17841040

申请日：2022-06-15

Applicant: Infinera Corp.

Inventor： Madhumita Pal ,  Dale Chin ,  Ramanujan Puranam ,  Madhura Joshi

IPC: G06F16/25 ,  G06F16/22

Abstract: Methods and systems for stitching real-time and historical data are disclosed herein. The data may be gathered from a line card and represent metrics of hardware or software elements of the line card. The historical data may be transferred and stored in an archive of a control card of a network element and the real-time data may be accessed by a proxy host of the control card substantially in real-time. A network administration device may access the historical data on the file collector and/or the real-time data from the proxy host of the control card and convert them to a time series database format and store the converted data in a time series database. A user may access a portion of the converted real-time and/or historical data using a graphical user interface, the accessed portion representing data gathered during a period of time selected by the user.

公开(公告)号：US20220303014A1

公开(公告)日：2022-09-22

申请号：US17699915

申请日：2022-03-21

Applicant: Infinera Corp.

Inventor： Pierre Mertz ,  Han Hennry Sun ,  Robert Maher

IPC: H04B10/40 ,  H04B10/532 ,  H04B10/61

Abstract: A transceiver is herein described. The transceiver comprises an optical source providing an optical signal, a modulator receiving the optical signal and configured to encode data into the optical signal, a transmitter module to receive data to be encoded into the optical signal and having at least one drive circuit supplying driver signals to the modulator to cause the modulator to encode data into a carrier having a frequency band and a tone signal outside of the frequency band into the optical signal, a narrowband filter operable to receive a portion of the optical signal via an optical loopback, the optical signal having the encoded data and a first tone reflection of the tone signal at a first instant of time and to pass the first tone reflection, a polarimeter operable to receive the first tone reflection and determine a first tone polarization of the first tone reflection.

公开(公告)号：US20220216127A1

公开(公告)日：2022-07-07

申请号：US17568535

申请日：2022-01-04

Applicant: Infinera Corp.

Inventor： John W. Osenbach ,  Gannon Reichert ,  Vinh Nguyen

IPC: H01L23/433 ,  H01L23/367 ,  H01L23/00 ,  H01L23/373 ,  H01L21/50

Abstract: Systems and methods of providing a bare circuit integrated circuit package with a containment ring are described. The bare circuit integrated circuit package may be provided with a substrate connected to a printed circuit board. An integrated circuit may be connected to the substrate. A stiffener ring that surrounds the integrated circuit may be attached to the substrate. A heat sink may be positioned on the stiffener ring and over the integrated circuit such that there is a space between a top of the integrated circuit and a bottom surface of the heat sink. A thermal interface material may be provided to thermally connect the integrated circuit and the heat sink. A containment ring may be positioned between the stiffener ring and the integrated circuit, the containment ring sized and positioned to prevent pumping and/or displacement of the thermal interface material.

公开(公告)号：US20210302671A1

公开(公告)日：2021-09-30

申请号：US17215728

申请日：2021-03-29

Applicant: Infinera Corp.

Inventor： Franklin Wall, JR. ,  John Osenbach ,  Jiaming Zhang

IPC: G02B6/42

Abstract: Opto-electronic packages and methods for making opto-electronic packages are disclosed, including a method comprising forming an opto-electronic circuit on a first surface of a substrate of a lower package assembly, the first surface of the substrate having a first bonding pattern configured to provide a hermetic seal, the first bonding pattern extending around the opto-electronic circuit; positioning a bottom of a ring frame onto the first bonding pattern so as to surround the opto-electronic circuit with the ring frame; hermetically sealing a bottom of the ring frame to the first bonding pattern of the first surface of the substrate of the lower package assembly subsequent to the formation of the opto-electronic circuit on the first surface of the substrate; and hermetically sealing a top of the ring frame to form a hermetically sealed opto-electronic package.